Methods, systems, and computer programs for monitoring quality of audio delivered over a communications channel are presented. One method includes an operation for defining timestamps. The timestamps are associated with a measure of time while delivering audio to a client computer, where each timestamp includes a plurality of timestamp bits. Further, the method includes an operation for modulating an audio signal with pseudo noise (PN) codes when a timestamp bit has a first logical value, and modulating the audio signal with a negative of the PN codes when the timestamp bit has a second logical value. After transmitting the modulated audio signal to the client computer, the timestamp bits are extracted from a received modulated audio signal to obtain received timestamps. The quality of the audio is assessed based on the received timestamps, and the quality of the audio is stored in computer memory.

A method and system of mud pulse telemetry uses a preamble having a number of periods of a synchronization sequence followed by a single period of a channel estimation sequence. The synchronization may be characterized by a generally flat frequency spectrum, and the channel estimation sequence may be characterized by a low cross-correlation with said synchronization sequence. The sequences may be generated from a set of nonrepeating discrete sequences. The preamble may be suitable for both sequence detection and channel estimation, satisfy all the physical and/or electronic constraints of the system, and allow for fast convergence of an adaptive channel tracking or equalization system.

Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.

An apparatus and method for use with a shared access communication channel is disclosed. A wireless network device receives signals and recovers data from a first plurality of subscriber units and a second plurality of subscriber units in a time interval. Received signals from the first plurality of subscriber units are distinguishable by having unique pseudo noise (PN) sequence with respect to others of the first plurality of subscriber units. Received signals the second plurality of subscriber units are distinguishable by a unique orthogonal sequence with respect to others of the second plurality of subscriber units. Received signals are distinguished between the first and second plurality of subscriber units based on detection of an orthogonal sequence present only in the received signals from the second plurality of subscriber units.

The present invention provides a preamble that is inserted into an OFDMA frame and has a common sequence for all the base stations participating in a transmission. The subscriber station performs fine synchronization using the common sequence on the common preamble, and the resulting peaks will provide the locations of candidate base stations. The base station specific search is then performed in the vicinities of those peaks by using base station specific pseudo-noise sequences. With this two stage cell search, the searching window is drastically reduced. The preamble is matched to known values by a respective receiver to decode the signals and permit multiple signals to be transferred from the transmitter to the receiver. The preamble may comprise two parts, Preamble-1 and Preamble-2, which may be used in different systems, including multioutput, multi-input (MIMO) systems.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

A clock data recovery circuit includes; a clock recovery circuit that receives a pseudo random binary sequence (PRBS) pattern and generates a recovery clock by counting edges of the PRBS pattern, and a data recovery circuit that generates recovery data from at least one of the PRBS pattern and externally provided serial data.

Advanced detectors for vector signaling codes are disclosed which utilize multi-input comparators, generalized on-level slicing, reference generation based on maximum swing, and reference generation based on recent values. Vector signaling codes communicate information as groups of symbols which, when transmitted over multiple communications channels, may be received as mixed sets of symbols from different transmission groups due to propagation time variations between channels. Systems and methods are disclosed which compensate receivers and transmitters for these effects and/or utilize codes having increased immunity to such variations, and circuits are described that efficiently implement their component functions.

A time differential digital circuit can detect a time difference between first and second event signals. The time difference measurement can be calibrated to account for transmission path delays. The time differential digital circuit can be implemented using field programmable gate array transceivers.

Source-synchronous communications between networked devices can be hindered by differing clock rates and data interface formats among the devices. By implementing a plurality of clock converters, a data interface format of a transmitting device is converted to a data interface format compatible with a receiving device. The clock converters provide a clock signal based on the source-synchronous data clock, and having a phase controlled with respect to an associated data signal. As a result, data exchange between devices operating at different clock rates is made possible.