H04L9/302

SECURE DIGITAL SIGNING
20220158846 · 2022-05-19 ·

A public-private key cryptographic scheme is described for granting authenticating a client to a remote device or service in order to access a secure resource. The client is provided the public key, but the private key is stored in a hardware security module (HSM) that the client is not able to access. The client requests a digital signature be generated from the private key from a secure vault service. The secure vault service accesses the HSM and generates the digital certificate, which is then passed to the client. The digital certificate may be added to a security token request submitted to an identity provider. The identity provider determines whether the digital signature came from the private key. If so, the identity provider provides authenticates the client and provides an access token that is usable by the client for authentication to the remote device with the secure resource

Systems and methods for post-quantum cryptography optimization

Systems, apparatuses, methods, and computer program products are disclosed for quantum computing (QC) detection. An example method includes generating QC detection data. The example method further includes generating a pair of asymmetric cryptographic keys comprising a public cryptographic key and a private cryptographic key, generating encrypted QC detection data based on the pair of asymmetric cryptographic keys, and destroying the private cryptographic key. The example method further includes monitoring a set of data environments for electronic information related to the encrypted QC detection data. Subsequently, the example method may include generating a QC detection alert control signal in response to detection of the electronic information related to the encrypted QC detection data.

Systems and methods for post-quantum cryptography optimization

Systems, apparatuses, methods, and computer program products are disclosed for quantum computing (QC) detection. An example method includes generating QC detection data. The example method further includes generating a pair of asymmetric cryptographic keys comprising a public cryptographic key and a private cryptographic key, generating encrypted QC detection data based on the pair of asymmetric cryptographic keys, and destroying the private cryptographic key. The example method further includes monitoring a set of data environments for electronic information related to the encrypted QC detection data. Subsequently, the example method may include generating a QC detection alert control signal in response to detection of the electronic information related to the encrypted QC detection data.

Protection of an iterative calculation

A calculation is performed on a first number and a second number. For each bit of the second number a first function is performed. The first function inputs include contents of a first register, contents of a second register and the first number. A result of the first function is placed in a third register. For each bit of the second number, a second function is performed which has as inputs contents of the third register and the contents of a selected one of the first and the second register according to a state of a current bit of the second number. A result of the second function is stored in the selected one of the first and second register.

METHOD OF DEFENSE AGAINST CRYPTOSYSTEM TIMING ATTACK, ASSOCIATED CRYPTOSYSTEM PROCESSING CIRCUIT, AND ASSOCIATED ELECTRONIC DEVICE
20230261851 · 2023-08-17 · ·

A method of defense against cryptosystem timing attack such as Rivest-Shamir-Adleman (RSA) cryptosystem timing attack, an associated cryptosystem processing circuit and an associated electronic device are provided. The method may include: utilizing a point double calculation circuit to perform a plurality of point double calculation operations related to a predetermined cryptosystem; utilizing a point add calculation circuit to perform a plurality of point add calculation operations related to the predetermined cryptosystem; and in response to there being no need to perform any point add calculation operation related to the predetermined cryptosystem, utilizing a dummy point add calculation circuit to perform a dummy point add calculation operation to emulate a calculation time of performing the any point add calculation operation, without changing a calculation result before performing the dummy point add calculation operation.

METHOD OF RSA SIGNATURE OR DECRYPTION PROTECTED USING A HOMOMORPHIC ENCRYPTION
20220141038 · 2022-05-05 ·

Decryption of an RSA encrypted message encrypted with a public RSA key by receiving encrypted key share components computed by generating a private RSA key d and a RSA modulus integer N, where N and d are integers; splitting the private key into key shares, encrypting with a fully homomorphic encryption (FHE) algorithm each key share component by using a Fully Homomorphic Encryption secret key ps associated with a set Ss to generate the encrypted key share components of said secure RSA key, computing an intermediate value YS for each set SS from said encrypted key share components, such that said computed intermediate value is a part of the RSA decrypted message, under FHE-encrypted form, and decrypting the encrypted message by combining said computed intermediate values for all sets.

Strong fully homomorphic white-box and method for using same
11728965 · 2023-08-15 · ·

A fully homomorphic white-box implementation of one or more cryptographic operations is presented. This method allows construction of white-box implementations from general-purpose code without necessitating specialized knowledge in cryptography, and with minimal impact to the processing and memory requirements for non-white-box implementations. This method and the techniques that use it are ideally suited for securing “math heavy” implementations, such as codecs, that currently do not benefit from white-box security because of memory or processing concerns. Further, the fully homomorphic white-box construction can produce a white-box implementation from general purpose program code, such as or C++.

Systems and methods for post-quantum cryptography optimization

Systems, apparatuses, methods, and computer program products are disclosed for post-quantum cryptography (PQC). An example method includes receiving data. The example method further includes receiving a set of data attributes about the data. The set of data attributes comprises one or more sets of data environment data attributes that are each representative of a set of data environments associated with the data. The example method further includes receiving one or more sets of data environment threat data structures associated with one or more data environments in the one or more sets of data environments associated with the data. The example method further includes selecting one or more cryptographic techniques for encrypting the data for at least the one or more data environments based on the set of data attributes, the one or more sets of data environment threat data structures, and a cryptograph optimization machine learning model.

SYSTEM AND METHOD FOR OBJECT RECOGNITION AND PRIVACY PRESERVATION

Systems and methods are provided for detecting an object region in an image and encrypting/decrypting a detected object region. The system comprises three main components: a database server, a data analytics system and a standard dashboard. The database server may further comprise a distributed database server and a key store database server. The data analytics system is executed by a computer processor configured to apply a multi-head self-supervised learning-based classifier to detect object information captured by the image. The data analytics system further comprise a privacy processing component that is configured to selectively encrypt the detected object using an encryption key following the advanced encryption standard with cipher block chaining mode (AES-CBC).

OPERATION METHOD, OPERATION APPARATUS, AND DEVICE

A storage circuit stores secret information. A software processing circuit obtains an operation task and generates scheduling instructions corresponding to the operation task. After receiving the scheduling instructions, a hardware processing circuit obtains the secret information from the storage circuit when the flag bit in the scheduling instruction is a valid value, determines, based on the secret information, data addresses of one or more pieces of operation data required for completing the operation corresponding to the scheduling instruction, and obtains the one or more pieces of operation data based on the data addresses to complete the operation corresponding to each scheduling instruction.