H04L12/4637

Permutated Ring Network
20180145850 · 2018-05-24 ·

A permutated ring network includes a plurality of bi-directional source-synchronous ring networks, each having a plurality of data transport stations, and a plurality of communication nodes. Each of the communication nodes is coupled to one of the data transport stations in each of the plurality of bi-directional source-synchronous ring networks.

Semiconductor device managing power budget using bi-directional ring structure and operating method thereof

A semiconductor device includes a plurality of chips including first and second chips, each of the first and second chips including a first input terminal receiving a first token input signal, a first output terminal outputting a first token output signal, a second input terminal receiving a second token input signal, and a second output terminal outputting a second token output signal. The first and second chips are coupled to each other in a bi-directional ring structure such that the first output terminal of the first chip is coupled to the first input terminal of the second chip and the second output terminal of the second chip is coupled to the second input terminal of the first chip. Each of the first and second chips performs a corresponding peak zone operation according to the first token input signal and the second token input signal.

Hierarchal label distribution and route installation in a loop-free routing topology using routing arcs at multiple hierarchal levels for ring topologies
09929938 · 2018-03-27 ·

In one embodiment, a method comprises creating, in a computing network, a loop-free routing topology comprising a plurality of routing arcs for reaching a destination network node, each routing arc comprising a first network node as a first end of the routing arc, a second network node as a second end of the routing arc, and at least a third network node configured for routing any network traffic along the routing arc toward the destination node via any one of the first or second ends of the routing arc, at least one of the first, second, or third network nodes are implemented as a ring-based network having a prescribed ring topology; and establishing loop-free label switched paths for reaching the destination network node via the routing arcs of the loop-free routing topology, the label switched paths independent and distinct from any attribute of the prescribed ring topology.

Redundant content bridging between substation communication networks

A method is disclosed for providing a network bridge between a source and a receiving network of a communication network, wherein the network bridge includes two content-bridging nodes connected between the source and the receiving networks according to a redundancy schema defined in IEC62439-3. The method can include assigning a common source network node identifier to the two content-bridging nodes; receiving, by each of the two content-bridging nodes, network traffic within the source network; and forwarding, by each of the two content-bridging nodes using the source network identifier, the network traffic from the source to the receiving networks.

Method for protecting an Ethernet ring from a superloop going through the Ethernet ring

The present invention relates to a method in an Ethernet ring for protecting the Ethernet ring from a superloop going through the Ethernet ring, wherein the Ethernet ring comprises at least one ring node and two interface nodes between the Ethernet ring and a VPLS-domain, the Ethernet ring further comprises a ring protection link, the method comprises the steps of: receiving in one of the interface nodes a withdrawal message intended to indicate that the other interface node is malfunctioning, the method being further characterized by the further step of; maintaining said ring protection link in the Ethernet ring in response to the withdrawal message.

INTERCONNECTED RING NETWORK IN A MULTI-PROCESSOR SYSTEM

In various embodiments, the present disclosure provides a system comprising a first plurality of processing cores, ones of the first plurality of processing cores coupled to a respective core interface module among a first plurality of core interface modules, the first plurality of core interface modules configured to be coupled to form in a first ring network of processing cores; a second plurality of processing cores, ones of the second plurality of processing cores coupled to a respective core interface module among a second plurality of core interface modules, the second plurality of core interface modules configured to be coupled to form a second ring network of processing cores; a first global interface module to form an interface between the first ring network and a third ring network; and a second global interface module to form an interface between the second ring network and the third ring network.

RESTORATION METHOD FOR AN MPLS RING NETWORK
20170155575 · 2017-06-01 ·

According to the present invention, there is provided a method for restoring a MultiProtocol Label Switching (MPLS) ring network in the event of a network link failure. The MPLS ring network comprises a path for traffic around the ring comprising a plurality of sequential Label Switched Paths (LSPs). The method comprises, at a network node in the MPLS ring network: detecting a failure along a network link traversed by a first LSP having an end point at the network node; in response to the detecting, encapsulating an Ethernet Ring Protocol (ERP) restoration message in a restoration pseudowire; and transmitting the restoration pseudowire within a second LSP over a subsequent network link. The method also comprises, at a network node in the MPLS ring network: receiving a first LSP comprising a pseudowire; detecting that the pseudowire is a restoration pseudowire comprising an Ethernet Ring Protocol (ERP) restoration message; and in response to the detecting, processing the ERP restoration message. There is also provided a network node for an MPLS ring network, and an MPLS ring network.

Method for identifying logical loops in ethernet networks
09647893 · 2017-05-09 · ·

A method and system for identifying logical loops in an Ethernet network may determine a number of nodes N and a number of links L between nodes. A number of rings R, including a number of major rings and a number of sub-rings for the Ethernet network may be determined. Specific formulas for the values for L, R, and N may be evaluated to determine when the Ethernet network includes logical loops.

Communication system for fault tolerance in cascade topology and ring topology
09614718 · 2017-04-04 · ·

A communication device is connected to an end of a first network of a cascade topology, and also to a second network. This communication device transmits a first list including information of communication devices, in the first network, that are destinations of transmission of frames through the first network, to an opposing communication device, in the second network, located at another end of the first network, and receives, from the opposing communication device, a second list including information of communication devices, in the first network, that are destinations of transmission of frames from the opposing communication device through the first network. The communication device determines in which of the first list and the second list a destination of a frame is included, and when the destination of the frame is included in the second list, transmits the frame to the second network.

CONFIGURABLE AND SCALABLE BUS INTERCONNECT FOR MULTI-CORE, MULTI-THREADED WIRELESS BASEBAND MODEM ARCHITECTURE
20170085475 · 2017-03-23 ·

Various aspects of this disclosure describe a bi-directional, dual interconnect bus configured in a ring to route data to processors implementing modem functions. A plurality of nodes may be coupled to form a ring bus comprising at least two interconnect rings. A plurality of processors may be assigned to the plurality of nodes. A first processor among the plurality of processors may be configured to process a first data type, and a second processor among the plurality of processors may be configured to process a second data type. Data on the ring bus may be separated into the first data type and the second data type, and separated data of the first data type may be routed on one interconnect ring to the first processor and separated data of the second data type may be routed on another interconnect ring to the second processor.