The present disclosure relates to a measurement arrangement including a sensor, an electronics module, a signal cable having a cable circuit, and a superordinate unit. The sensor is releasably pluggable to the electronics module which itself is releasably pluggable to the signal cable. The signal cable is connected with the superordinate unit. The plug connections between the sensor and the electronics module and between the electronics module and the signal cable may be galvanically isolated. The sensor outputs digital data in a first format to the electronics module. The electronics module outputs digital data in a second format to the signal cable. The superordinate unit is configured to receive and to process the digital data in the second format.

For communication across a capacitively coupled channel, an example circuit includes a first plate substantially parallel to a substrate, forming a first capacitance intermediate the first plate and the substrate. A second plate is substantially parallel to the substrate and the first plate, the first plate intermediate the substrate and the second plate. A third plate is substantially parallel to the substrate, forming a second capacitance intermediate the third plate and the substrate. A fourth plate is substantially parallel to the substrate and the third plate, the third plate intermediate the substrate and the fourth plate. An inductor is connected to the first plate and the third plate, the inductor to, in combination with the first capacitance and the second capacitance, form an LC amplifier.

An EHF receiver that determines an initial slicing voltage level and dynamically adjusts the slicing voltage level and/or amplifier gain levels to account for characteristics of the received EHF electromagnetic data signal. The architecture includes an amplifier, detector, adaptive signal slicer, and controller. The detector includes a main detector and replica detector that convert the received EHF electromagnetic data signal into a baseband signal and a reference signal. The controller uses the baseband signal and reference signal to determine an initial slicing voltage level, and dynamically adjust the slicing voltage level and the gain settings of the amplifier to compensate for changing signal conditions.

A galvanic isolation circuit comprising: a galvanic isolator having a first side and a second side; a first communication link connected to the first side of the galvanic isolator and connectable to a first transceiver a second communication link connected to the second side of the galvanic isolator and connectable to a second transceiver; a first reference terminal connectable to the first transceiver; a second reference terminal connectable to the second transceiver; and an AC short capacitor connected between the first reference terminal and the second reference terminal.

The present document discloses a transmission arrangement for coupling an amplifier to a transmission medium. An input node of the amplifier is couplable to a transmitter and an output node of the amplifier is couplable to a terminal of the transmission medium. The transmission arrangement may comprise a first branch coupled between the input node of the amplifier and an intermediate node which is couplable to a receiver. The transmission arrangement may further comprise a second branch coupled between the output node of the amplifier and the intermediate node. In particular, the first branch comprises a first capacitive element, while the second branch comprises a second capacitive element. Furthermore, at least one of the first and second branches further comprises a phase matching circuit coupled in series with the respective capacitive element.

Various examples are directed to a rotary coupler and methods of use thereof. The rotary data coupler may comprise a transmitter and receiver. The transmitter may comprise a first band and a second transmitter band. The receiver may comprise a receiver housing positioned to rotate relative to the first transmitter band and the second transmitter band. A first receiver band may be positioned opposite the first transmitter band to form a first capacitor and a second receiver band may be positioned opposite the second transmitter band to form a second capacitor. The receiver may also comprise a resistance electrically coupled between the first receiver band and the second receiver band and a differential amplifier. The differential amplifier may comprise an inverting input and a non-inverting input, with the non-inverting input electrically coupled to the first receiver band and the inverting input electrically coupled to the second receiver band.

Aspects of the present disclosure are directed to facilitating communications to respective circuit nodes in a manner that may also be useful for mitigating undesirable signal attenuation. As may be implemented in accordance with one or more embodiments, switchable isolation circuits, presented by at least one transformer and switch, are utilized to isolate adjacent data processing nodes on a bus in which each data processing node includes logic circuitry and processes signal therein. For each of the switchable isolation circuits, switching circuitry operates to mitigate communication propagation over the differential bus between adjacent data processing nodes, by switching the switchable isolation circuit for providing isolation. This approach may be utilized, for example, to assign sequential identification to daisy-chained circuit nodes upon start-up or reset, for use in addressing each node directly for further communication therewith.

In one embodiment, a transmitter circuit may be configured to transmit a signal to a receiver. The transmitter circuit may also be configured to detect receiving energy from a transient event, for example detect a transient current, and to direct at least a portion of the energy away from the transmitted signal while the transmitter circuit is transmitting the signal.

A method for communicating between a first system and a second system using a full-duplex synchronous serial link capable of simultaneously routing between both systems is disclosed. The data involved includes at least one message from the first system to the second, at least one message from the second system to the first, and a clock signal. The method involves the second system receiving a message and a clock signal sent by the first system, delayed and substantially in phase, the second system sends a message to the first system, the clock signal received by the second system is sent back to the first system with the message sent by the second system, and the first system receives the message sent by the second system and the sent-back clock signal, delayed and substantially in phase.

An encoding and transmitting system for a digital isolator system includes a transmitter for transmitting combined edge indicator signals through an isolation barrier, an encoder for generating the combined edge indicator signals based on first and second signals, a refresh clock generator for generating a refresh clock signal based on the first signal, and a refresh edge generator for masking at least a portion of the refresh clock signal, such that the portion of the refresh clock signal is not reflected in the second signal. The isolation barrier of the digital isolator system may be a capacitive isolation barrier for galvanically isolating a receiver from the transmitter. If desired, the refresh edge generator may include a refresh mask generator, one or more logic gates, and a glitch filter. A method of operating a digital isolator system is also described.