A mixed signal receiver includes a first sample and hold (S/H) circuit having a first S/H input terminal to receive an analog input signal and a first S/H output terminal directly coupled to a first common node; a first data slicer having a first slicer input terminal coupled to the first common node; and a first data-driven charge coupling digital-to-analog converter (DAC) including: (i) a DAC input terminal to receive a first digital signal from a first digital output of the first data slicer, (ii) a DAC output terminal directly coupled to the first common node, (iii) a plurality of capacitor modules configured to be pre-charged during a sample phase, and (iv) logic components, wherein when the logic components toggle a voltage on the plurality of capacitor modules, charge is capacitively coupled to or from the first common node during an immediately subsequent hold phase.

A hybrid electrical and optic system-on-chip (SOC) device configured for both electrical and optic communication includes a substrate, an electrical device configured for electrical communication arranged on the substrate, a photonics device configured for optic communication arranged on the substrate, and a self-test module arranged on the substrate. The self-test module is configured to receive a loop-back signal indicative of an optical signal output from the photonics device and calibrate the photonics device based on the loop-back signal.

Described herein are systems and methods that perform coarse chromatic dispersion (CD) compensation by applying precomputed coarse front-end equalizer (FEE) tap weights to a receiver based on an assumed propagation distance. After a waiting period, the FEE tap weights are applied, and it is determined whether the FEE tap weights cause a decision-directed tracking of channel rotations to satisfy a stability metric. In response to the stability metric not being satisfied, the assumed propagation distance is adjusted and used to obtain updated FEE tap weights. Conversely, if the stability metric is satisfied, a fine CD compensation is performed that comprises maintaining the updated FEE tap weights; performing an iterative least-mean-squared (LMS) error adaption to adjust Back-End Equalizer (BEE) tap weights and obtain updated BEE tap weights; and using the updated BEE tap weights to adjust the FEE tap weights to, ultimately, have the BEE output an equalized data bit stream.

A receiver for receiving a combination signal having two separate signal portions whose pulses are shifted relative to each other and/or whose carrier waves have a phase difference is configured to obtain a first series of samples using a first sampling and to obtain a second series of samples using a second sampling. The first sampling is adjusted to a symbol phase of the first signal portion, the second sampling is adjusted to a symbol phase of the second signal portion. The receiver is configured to obtain probabilities of transmission symbols of the first signal portion and probabilities of transmission symbols of the second signal portion for a plurality of sampling times based on the first and second series of samples, and to determine probabilities for transmission symbols of the first signal portion based on samples of the first sampling and estimated or calculated probabilities for transmission symbols of the second signal portion without taking into account inter-symbol interference between transmission symbols of the first signal portion in the samples of the first sampling, and determines probabilities for symbols of the second signal portion correspondingly. A corresponding method and computer program are described.

This application provides a symbol processing method and apparatus. The method includes: obtaining a plurality of complex-valued symbols; dividing the plurality of complex-valued symbols into a plurality of sets, where each set corresponds to one transmitted symbol; and performing a copy operation on the plurality of sets, so that two sets corresponding to two transmitted symbols that are consecutive in time domain have some same complex-valued symbols. By enabling two sets corresponding to two transmitted symbols that are consecutive in time domain to have some same complex-valued symbols, a guard interval between symbols can be flexibly configured when a cyclic prefix length is fixed.

An electronic control unit is mounted on a vehicle, and includes a reception unit that receives a data signal transmitted via a transmission path mounted on the vehicle; an environmental information acquisition unit that acquires environmental information of the vehicle; and a determination unit that determines the state of the transmission path, in which the reception unit includes an equalizer that compensates for the data signal, the equalizer calculates a compensation parameter for compensating for the data signal, and the determination unit determines the state of the transmission path based on the compensation parameter and the environmental information.

Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

A receiver front-end circuit and an operating method thereof are disclosed. The receiver front-end circuit includes a common-mode suppression circuit and a rear-stage circuit. The common-mode suppression circuit is used to receive an external input common-mode voltage signal and perform common-mode noise suppression processing on the external input common-mode voltage signal, and then output an internal input common-mode voltage signal. The rear-stage circuit is coupled to the common-mode suppression circuit and used to receive the internal input common-mode voltage signal. The dynamic swing of the internal input common-mode voltage signal is smaller than the dynamic swing of the external input common-mode voltage signal.

This invention discloses a multimode interconnection interface controller for a converged network, which comprises a SERDES element responsible for serial/parallel conversion, a LANE_TXCLK element responsible for generating a transmit clock, a SERDES initialization element responsible for link training and rate negotiation, and a PCS_EB coding element and an PCS_AF coding element responsible for physical layer coding of messages. The link training and rate negotiation are completed automatically via the shared SERDES initialization element. More universality and flexibility are provided for interconnection chip design by the PCS_EB coding element. The PCS_AF coding element is provided to reduce message penetration delay. The multimode interconnection interface controller is integrated in a single chip. Through flexible configuration, the single chip can meet transmission requirements of dedicated high speed networks and Ethernet networks. The multimode interconnection interface controller also supports interconnection of data center Ethernet and high performance computing high speed network.

Systems, methods, and apparatuses for wireless communication are described. Input data for in-phase branch/quadrature branch (I/Q) imbalance or mismatch may be compensated for or non-linear power amplifier noise may be used to generate compensated input data. In some examples, a transmitter may be configured to transmit communications signaling via a first antenna, the transmitter including a filter configured for digital mismatch correction; a receiver may be configured to receive communications signaling via a second antenna; and a switch may be configured to selectively activate a first switch path to couple the transmitter and the first antenna and a second switch path to couple the receiver and the transmitter to provide communications signaling received via the transmitter as feedback for the filter through the receiver.