Provided are a channel flatness compensation method, a channel flatness compensation apparatus, a storage medium, a baseband chip, and a device, wherein the method is applied to a transmitting link modulated by orthogonal frequency division multiplexing and includes: receiving an input vector of a current sub-carrier subjected to sub-carrier mapping processing, and determining current values of preset configuration parameters corresponding to the current sub-carrier; querying a preset frequency domain compensation table according to the current values of the preset configuration parameters, and determining a target compensation vector according to a query result; and determining an output vector of the current sub-carrier according to the input vector and the target compensation vector, wherein the output vector is used in an inverse fast Fourier transform operation.

Disclosed is a method comprising receiving first information indicating a first excess band; receiving second information indicating a second excess band; determining a third excess band for one or more multi-slot uplink transmissions, wherein the third excess band is determined based on the first excess band and the second excess band; and transmitting the one or more multi-slot uplink transmissions over multiple slots with the third excess band.

Methods and apparatus for shaping and filtering quantization errors conjointly in space and time to produce a higher-precision output in a spatially and temporally oversampled array. A space-time error-shaping array system has an array of sensors, each sensor producing a temporal signal comprising quantized waveforms. A multi-input multiple-output (MIMO) discrete-time filter structure with multiple inputs, each coupled to a sensor of the array of sensors, shapes quantization errors of the array of sensors on the basis of temporal aspects of the quantized waveforms conjointly with spatial aspects of the quantized waveforms.

A bottom hole assembly includes a single wire bus, a legacy sensor coupled to the single wire bus, and at least one high frequency communication sensor coupled to the single wire bus. The high frequency communication sensor injects a high frequency signal alternating between high frequency synchronization pulses and high frequency data signals onto the single wire bus. A first high frequency pass filter coupled between the at least one high frequency communication sensor and the single wire bus is also included. The high frequency pass filter passes the high frequency signal to the single wire bus from the high frequency communication sensor. The bottom hole assembly includes a first high frequency blocking filter coupled between the legacy sensor and the single wire bus. The high frequency blocking filter blocks the high frequency signal from the high frequency communication sensor from disturbing a legacy signal at the legacy sensor.

An OFDM signal may include a first edge band signal corresponding to a first edge band of the bandwidth of the OFDM signal, a second edge band signal corresponding to a second edge band of the bandwidth, and a center band signal corresponding to a center band of the bandwidth. The OFDM signal may be filtered by filtering the first edge band signal and/or the second edge band signal, so that out-of-band radiation of the OFDM may be reduced or eliminated.

The present invention provides for an improved application of signal strength weightings in a SDMA sectorized cellular network. The improved signal strength weightings application is conducted through the improved selection of weightings from a new codebook subset or by the selection of weightings from a larger codebook subset. In a further embodiment, an antenna beam index or bit map can be used to select the best beam(s) in a SDMA sectorized cellular network. In another embodiment, a field or factor in an uplink or downlink transmission packet can designate which directional transmission beam is best suited for the transmission or when the directional transmission beam should be activated.

A data bus interface may include a history buffer and a serializer. The history buffer may store bits representing a history of data recently transmitted on the data bus. The serializer may be configured to modify an input bit sequence containing original bits by interspersing padding bits with the original bits to suppress noise at one or more target frequencies. The serializer may output the modified input bit sequence on the data bus. Each padding bit of the plurality of padding bits may be generated based on values of at least two bits stored in the history buffer.

A high performance equalization method is disclosed for achieving low deterministic jitter across Process, Voltage and Temperature (PVT) for various channel lengths and data rates. The method includes receiving input signal at front end of a receiver upon passing through a channel, generating with an eye-opening monitor circuit a control code based on channel conditions, and equalizing with a continuous-time linear equalization equalizer (CTLE) circuit the input signal based on the control code such that the eye-opening monitor circuit and the CTLE circuit are biased based on their corresponding replica circuits, and the control code is generated in a feedforward configuration.

A receiving circuit includes first and second input sections through which signals are to be received, first and second signal lines connected to the first and second input sections, respectively, a first circuit connected to the first and second signal lines and including a termination circuit and a self-test circuit, first and second capacitive elements that are provided in the first and second signal lines and configured to allow alternating-current components of the received signals to pass therethrough and interrupt at least direct-current components of the received signals from passing through, a second circuit that is connected to the first and second signal lines and configured to boost a gain of the received signals in a certain frequency band that have passed through the first and second capacitive elements, and first and second output sections through which the received signals boosted by the second circuit are output.

The present disclosure relates to systems and methods for transmitting data in a video signal. The systems may perform the methods to generate a data frame, wherein the data frame may include at least a frame header and frame data, the frame header may include at least one autocorrelation and cross-correlation sequence; insert the data frame into an area of a video signal, wherein the inserted area of the video signal is not an area of line and field synchronization or an area of effective video; transmit the video signal having the data frame to another device.