A driver circuit of a PAM-N transmitting device transmits a PAM-N signal via a communication channel, wherein N is greater than 2, and the PAM-N signal has N signal levels corresponding to N symbols. A PAM-N receiving device receives the PAM-N signal. The PAM-N receiving device generates distortion information indicative of a level of distortion corresponding to inequalities in voltage differences between the N signal levels. The PAM-N receiving device transmits to the PAM-N transmitting device the distortion information indicative of the level of the distortion. The PAM-N transmitting device receives the distortion information. The PAM-N transmitting device adjusts one or more drive strength parameters of the driver circuit of the PAM-N transmitting device based on the distortion information.

Disclosed herein are an apparatus for analyzing a transmitter identification (TxID) signal and a method using the apparatus. The apparatus for analyzing the TxID signal includes a demodulator for decoding the bootstrap of a received signal; a cancellation unit for performing a host signal cancellation process for the received signal, thereby generating a host-signal-cancelled received signal; a correlator for calculating a correlation value between a signal corresponding to the host-signal-cancelled received signal and a signal corresponding to a TxID sequence; and a TxID profile analyzer for generating information about a channel between a transmitter corresponding to the TxID signal and a receiver using the correlation value.

A method and receiver are disclosed for the blind detection and synchronization of data packets are disclosed. According to one aspect, a method includes generating a running histogram of received sample values for each of a plurality of frequency bins and symbol timing phases, the running histogram spanning a most recent block of symbols representing a candidate synchronization (sync) word. The method also includes, for each symbol interval: analyzing the histogram to estimate symbol timing phase, DC offset and frequency offset. The method also includes determining a first candidate sync word based at least in part on the symbol timing phase, frequency offset and corresponding DC offset the first candidate sync word representing a most recent vector of bits associated with the first candidate sync word. The method further includes discerning a lower address part (LAP) obtained from the first candidate sync word to enable detection of a packet.

Systems and methods for enabling pre-compensation of timing offsets in OFDM receivers without invalidating channel estimates are described. Timing offset estimations may be sent along with the received OFDM symbols for FFT computation and generating a de-rotated signal output. The timing offset estimation may provide a reference point for dynamic tracking of timing for an OFDM signal and estimated based on an integral value associated with the OFDM signal.

Systems and methods for enabling pre-compensation of timing offsets in OFDM receivers without invalidating channel estimates are described. Timing offset estimations may be sent along with the received OFDM symbols for FFT computation and generating a de-rotated signal output. The timing offset estimation may provide a reference point for dynamic tracking of timing for an OFDM signal and estimated based on an integral value associated with the OFDM signal.

A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.

A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.

Methods and systems are described for monitoring and compensating an offset between a reference voltage used in a first device and a corresponding reference voltage used in a second device. The first device can include offset circuitry. The offset circuitry receives two voltage signals. The first voltage signal is equal to a first voltage value that is used as a reference voltage in the first device. The second voltage signal can be a time-varying voltage signal that has a known relationship with a second voltage value that is used as a reference voltage in the second device. The offset circuitry can then determine the second voltage value from the second voltage signal, and output an offset value based on a difference between the first voltage value and the second voltage value.

Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.

Embodiments of this application disclose an error correction method and apparatus. The method includes: obtaining an output signal and an amplitude value of a feed forward equalizer FFE, where the amplitude value is a channel response amplitude value corresponding to an equivalent channel of the FFE; performing level decision on the output signal based on the amplitude value to obtain a first decision signal, where the first decision signal includes (2M1) decision symbols, and M is an integer not less than 2; performing (1/(1+D)) decoding on the first decision signal to obtain a first decoded signal, and determining the first decoded signal as a second decision signal, where the second decision signal includes (M1) decision symbols; if an absolute value of the second decision signal is greater than (M1), determining that a burst error occurs in the second decision signal; and correcting the burst error.