A receiving device includes: a receiver that receives a signal including PPM symbols; a clock generator that generates a clock for sampling; an A/D converter that digital-converts the received signal; a reference position detector that detects a leading position of the PPM symbols based on data from the A/D converter; and a clock error detector that detects a clock error. The clock error detector includes: a pulse position detector that detects a pulse position in the PPM symbols based on data from the reference position detector and A/D converter; a position error calculator that calculates a deviation of the pulse position based on data from the reference position detector, A/D converter, and pulse position detector; and a clock error calculator that calculates the clock error based on data from the position error calculator. The receiving device varies a frequency of the clock based on data from the clock error calculator.

Provided is a signal processing device, for example, which is capable of transmitting to a communication device a superimposed signal in which predetermined information is superimposed on an operation signal of electrical equipment. The signal processing device (100) is provided with: a superimposed signal transmission unit (155) which transmits, to an external communication device (an information rewrite device 200, an input unit 4), a superimposed signal in which a data signal indicating predetermined information is superimposed on an operation signal corresponding to the state of an operation element; an information storage unit (140) for storing the predetermined information; and an information rewrite unit (153) which, on the basis of an external instruction input, rewrites the information stored in the information storage unit.

An optical modulator includes an optical waveguide including at least a first PN junction phase shifter and a second PN junction phase shifter. A driver circuit drives operation of the first and second PN junction phase shifters in response to a pulse amplitude modulated (PAM) analog signal having 2.sup.n levels. The PAM analog signal is generated by a digital to analog converter that receives an n-bit input signal. In an implementation, the optical waveguide and PN junction phase shifters are formed on a first integrated circuit chip and the driver circuit is formed on a second integrated circuit chip that is stacked on and electrically connected to the first integrated circuit chip.

In some embodiments, an apparatus and a system, as well as a method and an article, may operate to transmit and receive data. Transmission may comprise transforming larger values of acquired data into smaller values of transformed data using a transform defined by a seed value selected to reduce digital pulse position modulation transmission time for the acquired data. Additional activities include digital pulse position modulating the transformed data and a checksum associated with the transformed data to provide a propagation signal, and transmitting the propagation signal into drilling fluid or a geological formation. Reception may comprise receiving the propagation signal, demodulating the propagation signal to extract the transformed data and the checksum, and transforming the transformed data into an estimate of the acquired data, using the transform defined by the seed value validated by the checksum. Additional apparatus, systems, and methods are described.

Disclosed are techniques related to wireless communication system in which multi-level encoded modulation (MLCM) is applied to non-coherent communication. In the proposed techniques, a small fraction of differential phase rotations or bits participating in differential symbol coding are protected with strong codes while other complementary differential phase rotations or bits are protected with weaker codes. Compared to conventional non-coherent communication techniques in which a uniform protection is applied to any fraction of differential phase rotation or any bit of a differential symbol, the proposed MLCM approach enables more spectrally efficient scheme.

An apparatus and method relate generally to generation and checking of a quaternary pseudo random binary sequence (“QPRBS”). In an apparatus, there is a pseudo random binary sequence (“PRBS”) generator configured to receive a seed of a PRBS to be generated. A mask generator is configured to generate a mask output corresponding to the PRBS. The PRBS generator and the mask generator are both configured for sequential operation with respect to one another. A masking circuit is configured to receive the mask output and the PRBS to bitwise mask the PRBS with the mask output to generate the QPRBS.

A display device includes an encoder having at least one translation table, and encoding m (m is a natural number) bits of a data to n (n is a natural number and n>m) bits of a data on a basis of the at least one translation table; a clock recovery circuit configured to recover a clock from the data encoded by the encoder; a decoder configured to decode the n bits of the encoded data to the m bits of the data in accordance with the clock recovered by the clock recovery circuit; an output driver configured to output a voltage in accordance with the data decoded by the decoder; and a display element having a pixel applied with the voltage.

A display device includes an encoder having at least one translation table, and encoding m (m is a natural number) bits of a data to n (n is a natural number and n>m) bits of a data on a basis of the at least one translation table; a clock recovery circuit configured to recover a clock from the data encoded by the encoder; a decoder configured to decode the n bits of the encoded data to the m bits of the data in accordance with the clock recovered by the clock recovery circuit; an output driver configured to output a voltage in accordance with the data decoded by the decoder; and a display element having a pixel applied with the voltage.

A data processing system including an interface and an encoder. The interface is configured to receive first symbols from one or more ports. The interface is configured to aggregate a predetermined number of the first symbols to provide second symbols. The encoder is configured to (i) generate a header, and (ii) encode the second symbols to generate third symbols, where the header indicates whether the third symbols include a set of control codes. Responsive to the third symbols including the set of control codes, the encoder is configured to generate a pointer for the set of control codes, where the pointer can assume more values than are in the set of control codes.

A power encoder includes a pulse width modulator for modulating a signal according to a set of thresholds to produce a pulse width modulated (PWM) signal and a switch mode power amplifier for amplifying the PWM signal by switching states of switching devices according to amplitudes of the PWM signal. At least one or combination of a distribution of values of the voltage thresholds in the set and a distribution of values of a current generated by different switching devices are non-uniform. The set of voltage thresholds includes at least two positive voltage thresholds.