H04L25/49

Audio and lighting control via a communication bus

Disclosed herein are systems and techniques for audio and lighting control in a bus system. For example, in some embodiments, a bus system may be configured for operation as a light organ and/or to generate sound effects based on accelerometer data.

IBOC compatible superposition modulation by independent modulators utilizing clipping noise from peak-to-average power reduction
11381439 · 2022-07-05 · ·

According to an aspect of the present invention, there is provided a method for providing additional bandwidth to receivers that can decode a higher modulation comprising trading a peak-to-average power ratio (PAPR) reduction induced constellation noise of all or a subset of in-band on-channel (IBOC) carriers within an orthogonal frequency division multiplexing (ODFM) waveform with data carrying superposition modulation.

METHODS FOR PROVIDING A PULSE-WIDTH MODULATED POWER SIGNAL, NODE AND SYSTEM
20220255777 · 2022-08-11 ·

The invention relates to methods for providing a pulse-width modulated power signal in which control signals are used to define phase states and duration. The invention further relates to a corresponding node and to a corresponding system.

Multiple phase drive generator
11411784 · 2022-08-09 · ·

A system for producing a for digitally producing amplifier drive signals for high power transmission includes signal generators to produce, based on the desired transmit frequency and modulation, a high digital pulse, low digital pulse, or no digital pulse of the desired pulse width and phase relationship. The drive signal is a three-level signal, having states of “1”, “0”, and “−1”. A drive signal will direct the amplifier to output either its high voltage rail, 0 volts, or its low voltage rail. Multiple signal sets may be used to independently generate pulses based on differently phase shifted signals. These multiple drive signals can be used to drive multiple amplifiers, whose combined output produces a stair-step approximation to the desired transmit signal.

Techniques for communicating multi-level signals

Methods, systems, and devices for techniques for communicating multi-level signals are described. A first device may be configured to communicate signals with a second device according to a modulation scheme. The first device may transmit a first signal to the second device at a first voltage level of the modulation scheme corresponding to a first multi-bit value. The first device may select a second voltage level of the modulation scheme based on a difference between the first voltage level and a third voltage level of the PAM scheme, and may transmit a second signal to the second device at the second voltage level to indicate a second multi-bit value corresponding to the third voltage level. The second device may decode the second signal to determine the second multi-bit value based on receiving the first signal at the first voltage level and the second signal at the second voltage level.

CHANNEL STATE FEEDBACK EXTENSIONS FOR MULTI-LEVEL CODING

Methods, systems, and devices for wireless communications are described. A base station may transmit signaling that configures a wireless device to use a multi-level coding (MLC) procedure to communicate with a base station. Based on receiving the signaling, the wireless device may select a channel quality indicator (CQI) index from a set of CQI indices that are associated with an MLC procedure. In some examples, the wireless device selects the CQI index from a set of CQI indices that includes both bit-interleaved coded modulation (BICM)-based and MLC-based CQI indices. In other examples, the wireless device selects the CQI index from a set of CQI indices that includes solely MLC-based CQI indices. The wireless device may transmit the selected CQI index to the base station. And the base station may select a modulation and coding scheme for subsequent transmissions to the wireless device based on the received CQI index.

Clock duty cycle calibration and phase calibration for high-speed transmitter

A transmitter device having a calibrator circuit is disclosed. The calibrator circuit performs duty cycle calibration and phase calibration on a plurality of clock signals of the transmitter device. In one embodiment, the phase calibration is performed based on a comparison of the clock signals to a reference clock signal from the plurality of clock signals. In another embodiment, the calibrator circuit uses fixed patterns of data signals to perform phase calibration on the plurality of clock signals.

ERROR RATE MEASURING APPARATUS AND ERROR DISTRIBUTION DISPLAY METHOD
20220283223 · 2022-09-08 ·

An error rate measuring apparatus that measures whether or not an FEC operation of the device under test is possible based on a comparison result of the signal received from the device under test and a test signal includes an operation unit that sets a codeword length and an FEC symbol length of the FEC corresponding to a communication standard of the device under test, a data comparison unit that compares bit string data obtained by converting the signal received from the device under test with error data to detect an FEC symbol error of each FEC symbol length, a display unit that associates the bit string data of the FEC symbol length as one point with one unit region of a display region and performs color-coding display depending on presence or absence of occurrence of the FEC symbol error by each FEC symbol length.

Memory device supporting a high-efficient input/output interface and a memory system including the memory device

A memory system including: a memory controller to transmit a command, an address, or data to a first channel based on a data input/output signal having one of N (N is a natural number of three or more) different voltage levels during a first time interval, the memory controller transmitting the command, the address, or the data not transmitted during the first time interval to the first channel based on the data input/output signal having one of two different voltage levels during a second time interval; and a memory device to sample the data input/output signal received via the first channel during the first time interval in a pulse amplitude modulation (PAM)-N mode, the memory device sampling the data input/output signal received via the first channel during the second time interval in a non return to zero (NRZ) mode.

Peak-to-average power ratio (PAPR) reduction techniques

Techniques for peak-to-average power ratio (PAPR) reduction are described. Wireless devices may use one or more PAPR shaping resources, such as expanded bandwidth and/or pulse-shaping filtering, for shaping a signal to reduce PAPR. For example, expanded bandwidth may be utilized for adding a cyclic affix (CA), such as may comprise a cyclic prefix (CP), cyclic suffix (CS), etc., and combinations thereof, to a frequency domain data signal to provide a CP augmented frequency domain data signal used to generate a reduced PAPR time domain data signal. Additionally or alternatively, pulse-shaping filtering may be applied to a frequency domain signal to provide a pulse-shaped frequency domain data signal used to generate a reduced PAPR time domain data signal. Other aspects and features are also claimed and described.