Patent classifications
H04L25/49
METHOD OF SUPPRESSING UNWANTED SIGNAL PORTIONS IN AN IQ SIGNAL
A method of suppressing unwanted signal portions in an IQ signal generated by an IQ signal generator system includes generating, by a baseband circuit, a multi-tone baseband IQ signal, modulating, by a IQ modulator circuit, the baseband IQ signal, thereby obtaining a modulated IQ signal, determining, by an analysis circuit, a level function describing a signal level of the modulated IQ signal over time and/or over a phase of the multi-tone signal, determining, by the analysis circuit, at least one error quantity based on the level function, wherein the at least one error quantity is indicative of at least one error in the IQ signal generator system, and controlling, by a control circuit, the baseband circuit and/or the IQ modulator circuit in dependence of the at least one error quantity determined, thereby correcting the at least one error in the IQ signal generator system.
POWER STATE CONTROL FOR MULTI-CHANNEL INTERFACES
Various embodiments of the present technology may provide methods and apparatus for an interface having a first bi-directional channel and a second bi-directional channel. The interface operates in one of a first operational state and a second operational state, and performs an exemplary power-saving scheme if it is operating in the second operational state. The interface may detect a plurality of power states and initiate the power-saving scheme based on the detected power state. The plurality of power states may comprise a first power state (low current mode), a second power state (high current mode), and a third power state (mid-current mode).
Pulse amplitude modulation (PAM) encoding for a communication bus
Pulse amplitude modulation (PAM) encoding for a communication bus is disclosed. In particular, various two-wire communication buses may encode bits using three-level PAM (PAM-3) or five-level PAM (PAM-5) to increase bit transmission without requiring increases to clock frequencies or adding additional pins. Avoiding increases in clock frequencies helps reduce the risk of electromagnetic interference (EMI), and avoiding use of extra pins avoids cost increases for integrated circuits (ICs).
Interface for Bridging Out-of-Band Information from a Downstream Communication Link to an Upstream Communication Link
A device includes a first interface to receive a signal from a first communication link, wherein the receive signal includes out-of-band (OOB) information. A detector coupled to the first interface detects the OOB information. An encoder coupled to the detector encodes the OOB information into one or more symbols (e.g., control characters). A second interface is coupled to the encoder and a second communication link (e.g., a serial transport path). The second interface transmits the symbols on the second communication link. The device also includes mechanisms for preventing false presence detection of terminating devices.
DIRECT DIGITAL SEQUENCE DETECTION AND EQUALIZATION
Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages.
Multilevel driver for high speed chip-to-chip communications
A plurality of driver slice circuits arranged in parallel having a plurality of driver slice outputs, each driver slice circuit having a digital driver input and a driver slice output, each driver slice circuit configured to generate a signal level determined by the digital driver input, and a common output node connected to the plurality of driver slice outputs and a wire of a multi-wire bus, the multi-wire bus having a characteristic transmission impedance matched to an output impedance of the plurality of driver slice circuits arranged in parallel, each driver slice circuit of the plurality of driver slice circuits having an individual output impedance that is greater than the characteristic transmission impedance of the wire of the multi-wire bus.
Integrated physical coding sublayer and forward error correction in networking applications
Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that performs FEC encoding, in a first clock domain, on the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.
Integrated physical coding sublayer and forward error correction in networking applications
Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that performs FEC encoding, in a first clock domain, on the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.
Sampler reference level, DC offset, and AFE gain adaptation for PAM-N receiver
In a PAM-N receiver, sampler reference levels, DC offset and AFE gain may be jointly adapted to achieve optimal or near-optimal boundaries for the symbol decisions of the PAM-N signal. For reference level adaptation, the hamming distances between two consecutive data samples and their in-between edge sample are evaluated. Reference levels for symbol decisions are adjusted accordingly such that on a data transition, an edge sample has on average, equal hamming distance to its adjacent data samples. DC offset may be compensated to ensure detectable data transitions for reference level adaptation. AFE gains may be jointly adapted with sampler reference levels such that the difference between a reference level and a pre-determined target voltage is minimized.
Method and apparatus for transmitting and receiving feedback information
A method for transmitting feedback information by a terminal may comprise the steps of: receiving, from a base station, information on a feedback group allocated to the terminal in a predefined feedback table; selecting a first feedback index in the allocated feedback group; and transmitting feedback information including the selected first feedback index to the base station, wherein the feedback table includes a plurality of feedback groups, the plurality of feedback groups in the feedback table include predetermined number of feedback indices, respectively, and the plurality of feedback groups in the feedback table have differently configured quantization level resolutions for the feedback information, respectively.