H04L25/49

Time domain discrete transform computation

In accordance with embodiments, a first counter of a plurality of counters of an apparatus receives a plurality of pulse width signals in the time domain. The first counter generates a first increment signal in the time domain from the plurality of pulse width signals based on a first row of a Discrete Transform matrix. A synchronizer of the apparatus receives the first increment signal. The synchronizer generates a first synchronized increment signal in the time domain from the first increment signal. A first accumulator of a plurality of accumulators of the apparatus receives the first synchronized increment signal. The first accumulator accumulates the first synchronized increment signal over a period of time to generate a first frequency domain signal.

METHOD AND APPARATUS FOR A ONE BIT PER SYMBOL TIMING RECOVERY PHASE DETECTOR
20210021401 · 2021-01-21 ·

Embodiments are disclosed for timing recovery used in conjunction with a phase detector embedded in a receiver of a communication system. An example method includes receiving, via a receiver of a communication system, an input signal. The input signal encodes a plurality of bits in a number of amplitude levels. The method further includes using an analog to digital converter to generate a sampled signal based on the input signal. The method further includes using a first interpolation filter to filter the sampled signal. The method further includes using a second interpolation filter to filter the sampled signal. The method further includes using a first non-linear device to process an output of the first interpolation filter. The method further includes using a second non-linear device to process an output of the second interpolation filter. The method further includes performing a mathematical operation on an output of the first non-linear device with an output of the second non-linear device to generate phase information.

Line coding for optical transmission

Digital data (11) is encoded to a set of five line symbols for optical transmission. The line symbols have amplitude values of 0, A1, A2, where |A2|>|A1|. A first binary value maps to the line symbols 0 and A2 and a second binary value maps to the line symbols A1. The amplitude values of the line symbols can be in the ratio A1:A2=1:sqrt(2). At a receiver, the received signal is photodetected to generate an electrical signal which can represent a set of three possible received symbols (RS1, RS2, RS3). Digital data (26) is recovered from the received symbols by comparing the electrical signal with a first amplitude threshold (TH1) and a second amplitude threshold (TH2).

Pulse amplitude modulation-3 transceiver and operation method thereof

According to an embodiment of the inventive concept, a device for PAM-3 signaling includes an encoder selecting one of first to ninth transitions in first and second unit intervals that are successive and mapping data of three bits by using a remaining eight transitions other than the one selected among the first to ninth transitions, and an output driver receiving an output signal of the encoder via an input and generating a multi-level signal having an output voltage of first to third levels. The data of three bits is transmitted to a receiver terminal through the multi-level signal having the output voltage of the first to third levels during the first and second unit intervals that are successive. The device for PAM-3 signaling according to an embodiment of the inventive concept may transmit three bits during two unit intervals and may allow a receiver terminal to detect a windowing phenomenon.

Data communication system including a high-speed main channel and a low-speed stand-by channel with high reliability
10897307 · 2021-01-19 · ·

A data communication systems including a main channel that includes means for sending a signal, means for transmitting the signal and means for receiving the signal, the sending means sending signals at a known frequency. The communication system includes a stand-by channel that includes the following devices: a device for temporarily stopping the sent signal at instants known as stopping instants for a constant length of time that corresponds to the sending of a first determined number of sent signals, the stopping instants corresponding to temporal coding of a stand-by signal; a device for summing the amplitudes of the received signals, the summing being carried out on a second determined number of received signals; a device for temporally determining the instants corresponding to the minima of the summed signal, the determined instants having the same temporal coding as the stopping instants.

MULTILEVEL DRIVER FOR HIGH SPEED CHIP-TO-CHIP COMMUNICATIONS
20210014089 · 2021-01-14 ·

A plurality of driver slice circuits arranged in parallel having a plurality of driver slice outputs, each driver slice circuit having a digital driver input and a driver slice output, each driver slice circuit configured to generate a signal level determined by the digital driver input, and a common output node connected to the plurality of driver slice outputs and a wire of a multi-wire bus, the multi-wire bus having a characteristic transmission impedance matched to an output impedance of the plurality of driver slice circuits arranged in parallel, each driver slice circuit of the plurality of driver slice circuits having an individual output impedance that is greater than the characteristic transmission impedance of the wire of the multi-wire bus.

OPTICAL MODULATION/DEMODULATION METHOD, OPTICAL COMMUNICATION SYSTEM, OPTICAL TRANSMITTING DEVICE AND OPTICAL RECEIVING DEVICE

An object is to provide an optical modulation/demodulation method, an optical communication system, an optical transmitting device, and an optical receiving device capable of inhibiting an increase in the cost and a decrease in the band at the time of multiplexing services. The optical transmitting device according to the present invention sums a plurality of binary signals that have bit rates having such relation that the bit rate of any higher speed side is twice or more integer multiples of a bit rate of any lower speed side, having smaller amplitude as the corresponding bit rate becomes higher and having matched rise and fall timings, and generates a multi-level signal, and modulates light from one light source. In other words, generating a multi-level signal as a modulation signal enables a plurality of services to be multiplexed by one transmitter. The optical receiving device according to an aspect of the present invention sets a plurality of thresholds that can be used for identifying all the amplitude values of the multi-level signal for an optical signal that is service-multiplexed by the optical transmitting device described above and compares an amplitude of the multi-level signal acquired by performing photoelectric conversion of the received optical signal with the plurality of thresholds. The optical receiving device determines bits of the multiplexed binary signal on the basis of a result of the comparison.

Time Domain Discrete Transform Computation
20210014090 · 2021-01-14 ·

In accordance with embodiments, a first counter of a plurality of counters of an apparatus receives a plurality of pulse width signals in the time domain. The first counter generates a first increment signal in the time domain from the plurality of pulse width signals based on a first row of a Discrete Transform matrix. A synchronizer of the apparatus receives the first increment signal. The synchronizer generates a first synchronized increment signal in the time domain from the first increment signal. A first accumulator of a plurality of accumulators of the apparatus receives the first synchronized increment signal. The first accumulator accumulates the first synchronized increment signal over a period of time to generate a first frequency domain signal.

8b10b PAM4 encoding
20210014091 · 2021-01-14 · ·

Encoding PAM4 or PAM8 symbols to have a power spectral density (PSD) similar to the PSD of a standard 8b10b Non-Return-to-Zero stream. In one embodiment, a transmitter includes first and second 8b10b encoders that receive first and second streams split from an original byte stream. The first and second 8b10b encoders output first and second 8b10b streams, respectively. The first and second 8b10b streams are fed into a 2-bit combiner that performs a linear combination of the first and second 8b10b streams. And a 4-level Pulse Amplitude Modulation encoder (PAM4 encoder) converts the linear combination of each two bits, received from the combiner, into a PAM4 symbol. Wherein the resulting stream of PAM4 symbols has PSD similar to the PSD of the standard 8b10b non-return-to-zero stream.

PAM-4 DFE architectures with symbol-transition dependent DFE tap values

Decision feedback equalization (DFE) is used to help reduce inter-symbol interference (ISI) from a data signal received via a band-limited (or otherwise non-ideal) channel. A first PAM-4 DFE architecture has low latency from the output of the samplers to the application of the first DFE tap feedback to the input signal. This is accomplished by not decoding the sampler outputs in order to generate the feedback signal for the first DFE tap. Rather, weighted versions of the raw sampler outputs are applied directly to the input signal without further analog or digital processing. Additional PAM-4 DFE architectures use the current symbol in addition to previous symbol(s) to determine the DFE feedback signal. Another architecture transmits PAM-4 signaling using non-uniform pre-emphasis. The non-uniform pre-emphasis allows a speculative DFE receiver to resolve the transmitted PAM-4 signals with fewer comparators/samplers.