The present invention discloses a real-time normalization apparatus and method of the PGC demodulation in a sinusoidal phase modulation interferometer. An optical setup containing a measuring interferometer and a monitoring interferometer is constructed. An electro-optic phase modulator is placed in the common reference arm of the two interferometers. High-frequency sinusoidal wave modulation and low-frequency triangular wave modulation are applied to the electro-optic phase modulator at the same time. Sinusoidal modulation is used for generating phase carrier, and PGC demodulation is performed to obtain quadrature signals containing the phase information to be measured. Triangular wave modulation makes the quadrature signals change periodically. Ellipse fitting is performed on the Lissajous figure corresponding to the quadrature signals, and real-time normalization of the PGC demodulated quadrature signals is achieved. By calculating the variation of the phase difference between the two interference signals, the measured displacement is obtained, and nanometer scale displacement measurement is achieved.

Systems and methods for combining signals from multiple active wireless receivers are discussed herein. An exemplary system comprises a first downconverter, a phase comparator, a phase adjuster, and a second downconverter. The first downconverter may be configured to downconvert a received signal from a first antenna to an intermediate frequency to create an intermediate frequency signal. The phase comparator may be configured to mix the received signal and a downconverted signal to create a mixed signal, compare a phase of the mixed signal to a predetermined phase, and generate a phase control signal based on the comparison, the downconverted signal being associated with the received signal from the first antenna. The phase adjuster may be configured to alter the phase of the intermediate frequency signal based on the phase control signal. The second downconverter may be configured to downconvert the phase-shifted intermediate frequency signal to create an output signal.

A system having a set of common hardware and common signal processing together with a common waveform family that can be used to achieve both efficient radar and efficient communications functions. The system includes a common radar/communications transmitter having a transmission antenna and a combined radar and communications receiver having a common reception antenna. The common radar/communications transmitter is configured to transmit combined radar/communications waveform-modulated signals comprising symbols, each symbol consisting of an up chirp and a down chirp. The combined radar and communications receiver includes a baseband radar signal processing module configured to estimate range and range rate of a radar object from the received symbols and a baseband communications signal processing module configured to detect slopes and initial phases of the up and down chirps of each received symbol.

Methods, systems, and devices for wireless communication are described. A transmitting device may transmit a wakeup message to another device. The wakeup message may be transmitted using a transmit diversity scheme in accordance with aspects of the present disclosure. The transmit diversity may, for example, include a cyclic shift diversity scheme, a phase rotation scheme, a symbol generation scheme, or combinations thereof. The transmit diversity may in some cases improve a communication range of the wakeup message or otherwise benefit the wireless communications system.

A radio receiver device is arranged to receive a radio signal modulated with a data packet including an address portion. The radio receiver comprises:

a synchronisation circuit portion arranged to produce synchronization information corresponding to the data packet;

a demodulation circuit portion comprising a correlator, wherein said demodulation circuit portion is arranged to receive the radio signal and to produce an estimate of the address portion comprising a plurality of demodulated bits using said correlator and the synchronisation information;

an address checking circuit portion arranged to receive the plurality of demodulated bits, to check said plurality of demodulated bits for a predetermined bit pattern, and to produce a match flag if it determines that the plurality of demodulated bits corresponds to the predetermined bit pattern.

The radio receiver device is arranged such that, upon detecting an upcoming timeout event, the demodulation circuit portion sends a timeout warning signal to the address checking circuit portion using a handshaking channel therebetween; said address checking circuit portion being arranged such that, if it receives the timeout warning signal, it stops checking the plurality of demodulated bits for the predetermined bit pattern.

Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.

Circuitry and methods are described for digital signal demodulation. In a configurable receiver, a method includes receiving a radio frequency signal at the configurable receiver, operating the configurable receiver in a first mode, the first mode including providing the radio frequency signal to an amplitude detection circuit to determine an amplitude, providing the radio frequency signal to a phase detection circuit to determine a phase, and providing the amplitude and phase to a coordinate rotation digital computer (CORDIC) logic circuit, and operating the configurable receiver in a low power mode upon receiving an indication to selectively disable the amplitude detection circuit, the low power mode including providing the radio frequency signal to the phase detection circuit to determine the phase, and providing the phase and a predetermined constant value in lieu of the amplitude to the CORDIC logic circuit.

Methods and apparatus for receiving a user message in a communication network are disclosed. In an exemplary embodiment, a method includes receiving data samples in an uplink transmission from user equipment, performing preamble detection on the data samples, generating a trigger signal that indicates when a preamble is detected, and decoding a user message in response to the trigger signal, wherein the user message follows the detected preamble.

A receiver comprises a matched filter bank, decision logic and a frequency offset estimator. The matched filter bank comprises an input for receiving data representative of a frequency- or phase-modulated signal. The decision logic generates a sequence of demodulated symbol values from outputs of the matched filter bank. The frequency offset estimator determines a first phase value from a first output and a second phase value from a second output of the matched filter bank, the second output being offset from the first by L symbol periods. It also determines a phase adjustment value from an L-symbol subsequence within the sequence of demodulated symbol values, each subsequence value being determined from values output by the matched filter bank between the first and second outputs. It estimates a frequency offset based on the difference between the first phase value plus the phase adjustment value, and the second phase value.

An N-phase vector synthesis demodulator employing N number of mixers is presented. The received signal is mixed with locally generated N number of phase-shifted carrier signals at the N mixers, the individual phases of which are successively and equally 360?/N shifted. The final in-phase (I) and quadrature-phase (Q) signals are zero-force synthesized from the demodulated N-phase vector signals. Compared with the conventional I/Q demodulator that obtains the I and Q signals directly from two mixers of 0? and 90? carrier signal phases, the multi-phase demodulator provides significantly high linearities in the demodulated I and Q signals as the zero-force synthesizer performs an optimal combining of the N-phase demodulated signals while minimizing distortions, interferences, and noise.