Patent classifications
H04L45/7453
MULTICAST MULTIPATHING IN AN OVERLAY NETWORK
The subject technology addresses a need for improving utilization of network bandwidth in a multicast network environment. More specifically, the disclosed technology provides solutions for extending multipathing to tenant multicast traffic in an overlay network, which enables greater bandwidth utilization for multicast traffic. In some aspects, nodes in the overlay network can be connected by virtual or logical links, each of which corresponds to a path, perhaps through many physical links, in the underlying network.
CONTENT OBJECT RETURN MESSAGES IN A CONTENT CENTRIC NETWORK
One embodiment provides a system that indicates conditions associated with received content. During operation, the system generates, by a first computing device, an interest message which includes a name, wherein the interest message further includes a verification token which is a hash of a nonce. In response to transmitting the interest message to a second computing device, the system receives a content object message which includes a same name as the name for the interest message. In response to detecting a condition associated with the content object message, the system generates a content object return message which includes the nonce and a same name as the name for the content object message. The system forwards the content object return message to the second computing device, thereby facilitating the second computing device to process the content object return message.
METHOD FOR FOWARDING VECTOR PACKET PROCESSING
A method for forwarding a vector packet processing (VPP) is applicable to a forwarding path. The forwarding path includes an Ethernet entrance, a data plane development kit (DPDK) input end, an entrance labeling-and-categorizing plug-in unit, one or more intermediate nodes, a Tx output end, an exit labeling-and-categorizing plug-in unit, and an Ethernet exit. The vector packet processing forwarding method includes: executing a learning-and-recording mode for a preceding packet to obtain a learning result, and in the learning-and-recording mode, having the preceding packet entirely pass through the forwarding path; and executing an optimized acceleration mode for a subsequent packet, and in the optimized acceleration mode, based on the learning result, having the subsequent packet detour some intermediate nodes of the one or more intermediate nodes in the forwarding path.
Systems and Methods for Balancing Loads Across Multiple Processing Cores of a Wireless Device
In an example method, a system obtains a data packet for processing, determines a hash value representing the data packet, and selects a processor core from among a plurality of processor cores for processing the data packet. The processor core is selected by determining, based on the hash value, that the hash value corresponds to a first processor core from among the plurality of processor cores, and determining, based on a plurality of data structures stored by the load balancing system, whether to select the first processor core or a second processor core from among the plurality of processor cores for processing the data packet. Further, the system causes the selected processor core to process the data packet.
Large Network Simulation
Systems, methods, and apparatuses are described for simulating a network. Interrogations directed to hosts in the simulated network may be received. For some interrogations, data objects may be instantiated to simulate the interrogated hosts by, e.g., providing responses to low-level network commands. One or more characteristics of a simulated host may be determined randomly or pseudo-randomly.
Large Network Simulation
Systems, methods, and apparatuses are described for simulating a network. Interrogations directed to hosts in the simulated network may be received. For some interrogations, data objects may be instantiated to simulate the interrogated hosts by, e.g., providing responses to low-level network commands. One or more characteristics of a simulated host may be determined randomly or pseudo-randomly.
Flow cache management
Packet-processing circuitry including one or more flow caches whose contents are managed using a cache-entry replacement policy that is implemented based on one or more updatable counters maintained for each of the cache entries. In an example embodiment, the implemented policy enables the flow cache to effectively catch and keep elephant flows by giving to the caught elephant flows appropriate preference in terms of the cache dwell time, which can beneficially improve the overall cache-hit ratio and/or packet-processing throughput. Some embodiments can be used to implement an Open Virtual Switch (OVS). Some embodiments are advantageously capable of implementing the cache-entry replacement policy with very limited additional memory allocation.
Flow cache management
Packet-processing circuitry including one or more flow caches whose contents are managed using a cache-entry replacement policy that is implemented based on one or more updatable counters maintained for each of the cache entries. In an example embodiment, the implemented policy enables the flow cache to effectively catch and keep elephant flows by giving to the caught elephant flows appropriate preference in terms of the cache dwell time, which can beneficially improve the overall cache-hit ratio and/or packet-processing throughput. Some embodiments can be used to implement an Open Virtual Switch (OVS). Some embodiments are advantageously capable of implementing the cache-entry replacement policy with very limited additional memory allocation.
Handling packets travelling towards logical service routers (SRs) for active-active stateful service insertion
Example methods and computer systems for packet handling for active-active stateful service insertion are disclosed. One example may involve a computer system detecting a packet addressed from a source address to a service endpoint address. Based on configuration information associated with the service endpoint address, the computer system may identify a first active logical service router (SR) and a second active logical SR that are both associated with the service endpoint address and configured to operate in an active-active mode. The first active logical SR may be selected over the second active logical SR by mapping tuple information to the first active logical SR. The computer system may generate an encapsulated packet by encapsulating the packet with an outer header addressed to an outer destination address associated with the first active logical SR and send the encapsulated packet towards the first active logical SR for processing according to a stateful service.
Handling packets travelling towards logical service routers (SRs) for active-active stateful service insertion
Example methods and computer systems for packet handling for active-active stateful service insertion are disclosed. One example may involve a computer system detecting a packet addressed from a source address to a service endpoint address. Based on configuration information associated with the service endpoint address, the computer system may identify a first active logical service router (SR) and a second active logical SR that are both associated with the service endpoint address and configured to operate in an active-active mode. The first active logical SR may be selected over the second active logical SR by mapping tuple information to the first active logical SR. The computer system may generate an encapsulated packet by encapsulating the packet with an outer header addressed to an outer destination address associated with the first active logical SR and send the encapsulated packet towards the first active logical SR for processing according to a stateful service.