Patent classifications
H04L45/74591
System and method for allowing multiple global identifier (GID) subnet prefix values concurrently for incoming packet processing in a high performance computing environment
System and method for using multiple global identification subnet prefix values in a network switch environment in a high performance computing environment. A packet is received from a network fabric by a first Host Channel Adapter (HCA). The packet has a header portion including a destination subnet prefix identifying a destination subnet of the network fabric. The network HCA is allowed to receive the first packet from a port of the network HCA by selectively determining a logical state of a flag and, selectively in accordance with a predetermined logical state of the flag, ignoring the destination subnet prefix identifying the destination subnet of the network fabric.
System and method for supporting subnet number aliasing in a high performance computing environment
System and method for supporting subnet number aliasing in a high performance computing environment. In accordance with an embodiment, a fabric member can be assigned, by a global fabric manager, an alias fabric local subnet number in order to keep a fabric running after a fabric reconfiguration. The alias fabric local subnet number can be assigned for a period of time, the period of time being static, configurable, or indefinite.
Network Address Translation With Filters Using Hierarchical Rules
A system administrator can specify NAT mappings to perform NAT translations in a switch. The administrator can specify an ACL to filter packets to be translated. Filter rules generated from the ACL are stored in a first memory store in a switch and NAT rules generated from the NAT mappings are stored in a second memory store separate from the first memory store. When a packet matches one of the filter rules a tag that identifies the ACL is associated with the packet. When the tagged packet matches one of the NAT rules, the packet is translated according to the matched NAT rule.
Packet transmission
A packet-transmission method, a local edge device and a machine-readable storage medium are provided. The method includes: receiving a first notification message from an opposite edge device, parsing out a first host route from the first notification message, and adding a first forwarding table entry to a software forwarding table, wherein the first forwarding table entry includes a correspondence between the first host route and an interface receiving the first notification message; inquiring, after receiving a packet, a hardware forwarding table according to a destination address of the packet, if there is no forwarding table entry matched with the destination address in the hardware forwarding table, inquiring the software forwarding table according to the destination address of the packet, if there is a forwarding table entry matched with the destination address in the software forwarding table, sending the packet according to the forwarding table entry matched with the destination address.
Apparatus and method for low latency switching
A method of data switching. Data is received by at least one input port of a crosspoint switch. The crosspoint switch configurably casts the data to at least one output port of the crosspoint switch. Each output port of the crosspoint switch is connected to a respective input of a logic function device such as an FPGA. The logic function device applies a logic function to data received from each output port of the crosspoint switch, such as address filtering or multiplexing, and outputs processed data to one or more respective logic function device output interfaces. Also, a method of switching involving circuit switching received data to an output while also copying the data to a higher layer function.
Content Addressable Memory (CAM) Based Hardware Architecture For Datacenter Networking
A communication protocol system is provided for reliable transport of packets. A content addressable memory hardware architecture including a reorder engine and a retransmission engine may be utilized for the reliable transport of the packets. In this regard, a reorder engine includes a content addressable memory (CAM) and one or more processors in communication with the CAM. The one or more processors are configured to receive a first set of data packets when executed by the one or more processors. The one or more processors are configured to access the content addressable memory to process the first set of data packets. The one or more processors are configured to save data information of the first set of the data packets in the content addressable memory.
Hybrid wildcard match table
Embodiments of the present invention are directed to a wildcard matching solution that uses a combination of static random access memories (SRAMs) and ternary content addressable memories (TCAMs) in a hybrid solution. In particular, the wildcard matching solution uses a plurality of SRAM pools for lookup and a spillover TCAM pool for unresolved hash conflicts.
Directed graph traversal using content-addressable memory
This disclosure describes techniques that include representing, traversing, and processing directed graphs using one or more content-addressable memory devices. In one example, this disclosure describes a method that includes presenting query data to one or more ternary content-addressable memory (TCAM) devices, wherein the query data includes state data and key data; receiving, from the TCAM devices, information about a matching address identified by the TCAM devices; accessing, based on the information about the matching address, information in one or more storage devices; performing, based on the information in the one or more storage devices, at least one operation on data included within the one or more storage devices to generate processed data; outputting the processed data; determining, based on the information in the one or more storage devices, new state data and a new key value; and presenting new query data to the TCAM devices.
Flow monitoring in network devices
Flow state information that is stored in a first memory among a plurality of memories for maintaining flow state information at a network device is updated based on packets ingressing the network device. The memories are arranged in a hierarchical arrangement in which memories at progressively higher levels of hierarchy are configured to maintain flow state information corresponding to progressively larger sets of flows processed by the network device. When it is determined that a fullness level of the first memory exceeds a first threshold, flow state information associated with at least one flow, among a first set of flows for which flow state information is currently being maintained in the first memory, is transferred from the first memory to a second memory, the second memory being at a higher hierarchical level than the first memory. A new flow is instantiated in space freed up in the first memory.
Dynamically-Optimized Hash-Based Packet Classifier
A network element includes multiple ports and a packet classifier. The packet classifier is configured to receive rules and Rule Patterns (RPs), each RP corresponding to a subset of the rules and specifies positions of unmasked packet-header bits to be matched by the rules in the subset, to store in a RAM a grouping of the RPs into Extended RPs (ERPs), each ERP defining a superset of the unmasked bits in the RPs associated therewith, to receive packets and match each packet to one or more of the rules by accessing the ERPs in the RAM, to determine counter values, each counter value corresponding to a respective RP and is indicative of a number of the received packets that match the RP, and to adaptively modify grouping of the RPs into the ERPs depending on the counter values.