Patent classifications
H04L49/115
Messaging between remote controller and forwarding element
Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.
Early data transmission methods and communication device for early data transmission using a message 3 (MSG3)
Data transmission methods and a communication device are provided. The method includes the following. A terminal device transmits an uplink message, where the uplink message includes a first message 3 (MSG3) for accessing a first cell, and the first MSG3 includes uplink early data stored in non-access stratum (NAS) information, or the uplink message includes the first MSG3 for accessing the first cell and the uplink early data. The first MSG3 carries indication information, and the indication information indicates whether the uplink early data is retransmission data.
LINK TIMER FOR ETHERNET
The present disclosure relates to systems and methods for communicating in an Ethernet-based network using a transport layer without assistance of software-controlled mechanisms. In some embodiments, a first node includes a hardware link timer configured to determine packets transmitted under the transport layer hardware only Ethernet protocol to replay. The hardware link timer can include a first-in-first-out (FIFO) memory configured to store timing and status information associated with one or more links established by the first node. The hardware link timer can further include a timer associated with the one or more links that ticks according to a time period.