Example implementations relate to a switch resource manager for a network switching device. In an example, a network switching device includes a packet switching device and an operating system kernel. The operating system kernel includes a driver for the packet switching device. The network switching device also includes a switch resource manager including a library of commands for the packet switching device. The switch resource manager can send commands to the packet switching device via the driver. The operating system kernel can load a network operating system instance into user space of the network switching device.

System and method for supporting scalable representation of link stability and availability in a high performance computing environment. A method can provide at attribute at each node in a subnet, wherein the attribute provides a single location at each node for a subnet manager to query the stability and availability of each link connected to the queried node. The attribute can be populated and maintained by a subnet management agent residing at the node.

System and method for providing an InfiniBand network device having a vendor-specific attribute that contains a signature of the vendor. An exemplary embodiment can provide an InfiniBand compatible network device from a vendor. The vendor can further define a subnet management attribute, where the subnet management attribute has an attribute identifier in the range of attribute identifiers reserved in the InfiniBand specification. The vendor can define a signature bit string that is a fixed number of bits in length and a number of offset bits, where the number of offset bits indicates the start of the signature bit string within the attribute. The subnet management attribute can be configured with the signature bit string starting where the offset bits indicate, and the subnet management attribute can be included as an attribute of the InfiniBand compatible network device.

System and method for supporting scalable representation of link stability and availability in a high performance computing environment. A method can provide at attribute at each node in a subnet, wherein the attribute provides a single location at each node for a subnet manager to query the stability and availability of each link connected to the queried node. The attribute can be populated and maintained by a subnet management agent residing at the node.

A data processing apparatus includes N apparatus input ends, an input switch, K cache areas, a first output switch, a second output switch, and M apparatus output ends. N input ends of the input switch are coupled to the N apparatus input ends, and K output ends of the input switch correspond to the K cache areas. K.sub.1 input ends of the first output switch correspond to K.sub.1 cache areas in the K cache areas, and M output ends of the first output switch are coupled to the M apparatus output ends. K.sub.2 input ends of the second output switch correspond to K.sub.2 cache areas in the K cache areas except the K.sub.1 cache areas, and M output ends of the second output switch are coupled to the M apparatus output ends.

Techniques for processing packets on a network interface controller (NIC) with memory chiplets are disclosed. In an illustrative embodiment, a NIC includes a disaggregated memory with several high-bandwidth memory chiplets spread out in various locations on the NIC. The disaggregated nature of the memory can improve latency, throughput, and scalability as well as improve thermal performance by distributing heat generation to different locations on the NIC. In use, ports of the NIC can be configured to identify packets associated with certain flows and direct those packets to queues on the NIC. Direct memory access circuitry can copy the packets from queues on the NIC to queues on the system memory. This chain of copying packets from the port to the system memory creates a kind of virtual circuit, delivering packets directly to applications with low latency.

Techniques for processing packets on a network interface controller (NIC) with memory chiplets are disclosed. In an illustrative embodiment, a NIC includes a disaggregated memory with several high-bandwidth memory chiplets spread out in various locations on the NIC. The disaggregated nature of the memory can improve latency, throughput, and scalability as well as improve thermal performance by distributing heat generation to different locations on the NIC. In use, ports of the NIC can be configured to identify packets associated with certain flows and direct those packets to queues on the NIC. Direct memory access circuitry can copy the packets from queues on the NIC to queues on the system memory. This chain of copying packets from the port to the system memory creates a kind of virtual circuit, delivering packets directly to applications with low latency.

Example implementations relate to a switch resource manager for a network switching device. In an example, a network switching device includes a packet switching device and an operating system kernel. The operating system kernel includes a driver for the packet switching device. The network switching device also includes a switch resource manager including a library of commands for the packet switching device. The switch resource manager can send commands to the packet switching device via the driver. The operating system kernel can load a network operating system instance into user space of the network switching device.

A system for using staging buffers in broadcast or multicast operations is disclosed. In some embodiments, the system comprises a server fabric adapter (SFA) communicatively coupled to a plurality of accelerators. The system is configured to provide a memory tier that is accessed by the plurality of accelerators; receive data in a send queue of the memory tier; establish an association between buffers of the send queue and one or more receive queues based on a pattern of sharing defined by one or more of the plurality of accelerators; and transmit the data to the one or more accelerators by sending the data from the send queue to the one or more receive queues based on the association.

A system for using staging buffers in broadcast or multicast operations is disclosed. In some embodiments, the system comprises a server fabric adapter (SFA) communicatively coupled to a plurality of accelerators. The system is configured to provide a memory tier that is accessed by the plurality of accelerators; receive data in a send queue of the memory tier; establish an association between buffers of the send queue and one or more receive queues based on a pattern of sharing defined by one or more of the plurality of accelerators; and transmit the data to the one or more accelerators by sending the data from the send queue to the one or more receive queues based on the association.