H04L49/206

SCHEDULING OF DATA TRAFFIC
20200228463 · 2020-07-16 ·

A method of scheduling traffic in a network node is provided. A cyclic traffic schedule for a first traffic class, such as a first real time traffic class, includes a reception phase and a transmission phase. The method includes setting the transmission phase (T00) of the network node to coincide with the reception phase of at least two neighboring network nodes.

VIDEO ROUTER
20200220813 · 2020-07-09 ·

The embodiments described herein provide a data transmission system comprising a plurality of video routers, a supervisory system for transmitting one or more router configuration signals to one or more video routers, and a control communication network for coupling the plurality of video routers and the supervisory system. Each router in the system comprises a backplane including a plurality of backplane connections, at least one line card and at least one fabric card. Each line card comprises a plurality of input ports and output ports where each input and output port is coupled to a respective external signal through the backplane. Each line card further comprises a line card cross-point switch having a plurality of input switch terminals and a plurality of output switch terminals. Each fabric card comprises a fabric card cross-point switch having a plurality of input switch terminal and a plurality of output switch terminals. Furthermore, each line card and each fabric card comprises a card controller where the card controller selectively couples one or more input switch terminals of a cross-point switch to the output switch terminals of that cross-point switch. The cross-point switches being manipulated by the card controller may belong to one or more different cards within the same video router.

SERVER REDUNDANT NETWORK PATHS
20200186460 · 2020-06-11 ·

In a group of servers, a link fault to one of the servers is detected. In response to detecting the link fault, network traffic that uses the faulty link is distinguished and the distinguished network traffic is forwarded. Applicable backup links are activated, and the distinguished traffic is redirected using an activated backup link for the faulty link.

Method and apparatus for extracting data stream information in low-latency mode by ethernet chip
10659394 · 2020-05-19 · ·

The present invention discloses a method and an apparatus for extracting data stream information by an Ethernet switch chip in a low-latency mode. The method includes: setting, by a data feature extraction module, one piece of starting information including feature information and one piece of ending information including a packet length; performing matching, by a data stream feature comparison module, on the feature information, and if the matching succeeds, sending the starting information and the ending information to a module for collecting statistics on data stream information; and combining, by the module for collecting statistics on data stream information, the feature information in the starting information and the packet length in the ending information into one piece of data stream information, and sending the data stream information to a CPU. By using the method and the apparatus disclosed in the present invention, not only a low-latency requirement is satisfied, but also entire data stream information can be extracted and reported to the CPU, facilitating network management.

Information processing apparatus, information processing method, and computer program product

According to an embodiment, an information processing apparatus includes a prefetch unit and a scheduler unit. The prefetch unit is configured to prefetch a scheduling entry corresponding a future time period in advance from scheduling information including one or more entries each of which at least contains a transmission state and interval for each of one or more transmission queues. The scheduler unit configured to determine a starting time of transmission for each frame waiting for transmission in each queue, on the basis of the prefetched entry.

GENLOCK MECHANISM FOR SOFTWARE PACING OF MEDIA CONSTANT BIT RATE STREAMS

Techniques for communicating packets in a computer network are provided. At a network device, a first stream of packets is obtained from a packet processing node. A second stream of packets is obtained from a packet generating node. A counter is maintained that counts a number of the packets received from the second stream. An internal clock signal of the network device is obtained. A control signal is generated for pacing the first stream of packets based on the counter and the internal clock signal. The first stream of packets is provided to a packet consuming node based on the control signal.

SURVEILLANCE SYSTEMS AND METHODS FOR AUTOMATIC REAL-TIME MONITORING

The present disclosure describes various embodiments of surveillance systems and methods. In one such embodiment, an exemplary surveillance system includes at least one video camera configured to capture video data of a surveilled area; and a computing device that stores a surveillance program. An exemplary surveillance program includes computer-executable instructions configured to: analyze the video data captured by the at least one video camera; identify objects that enter the surveilled area and log a time at which the objects entered the surveilled area; determine an object type for each object; track the identified objects to determine a period of time the objects have been present within the surveilled area; and generate and transmit an alert for each identified object that has been present within the surveilled area for a period of time that exceeds a predetermined time threshold.

Video router
10587506 · 2020-03-10 · ·

The embodiments described herein provide a data transmission system comprising a plurality of video routers, a supervisory system for transmitting one or more router configuration signals to one or more video routers, and a control communication network for coupling the plurality of video routers and the supervisory system. Each router in the system comprises a backplane including a plurality of backplane connections, at least one line card and at least one fabric card. Each line card comprises a plurality of input ports and output ports where each input and output port is coupled to a respective external signal through the backplane. Each line card further comprises a line card cross-point switch having a plurality of input switch terminals and a plurality of output switch terminals. Each fabric card comprises a fabric card cross-point switch having a plurality of input switch terminal and a plurality of output switch terminals. Furthermore, each line card and each fabric card comprises a card controller where the card controller selectively couples one or more input switch terminals of a cross-point switch to the output switch terminals of that cross-point switch. The cross-point switches being manipulated by the card controller may belong to one or more different cards within the same video router.

Transfer apparatus and frame transfer method

A transfer apparatus has an input port and an output port, an input line speed of the input port and an output line speed of the output port being capable of being set to differ from each other. The transfer apparatus comprises, for each output port: a low-latency frame transmission buffer to store a low-latency frame received at the input port; a normal-latency frame transmission buffer to store a normal-latency frame that is a frame received at the input port, the normal-latency frame being permitted to be transferred with higher latency than the low-latency frame; a time calculation unit to calculate output start time of the low-latency frame by using information on a frame length of the low-latency frame, the input line speed, and the output line speed when the low-latency frame is received; and an output contention control unit to control transfer of the low-latency frame and the normal-latency frame by using the output start time.

PACKET BUFFERING TECHNOLOGIES

Examples described herein relate to a switch. In some examples, the switch includes circuitry that is configured to: based on receipt of a packet and a level of a first queue, select among a first memory and a second memory device among multiple second memory devices to store the packet, based on selection of the first memory, store the packet in the first memory, and based on selection of the second memory device among multiple second memory devices, store the packet into the selected second memory device. In some examples, the packet is associated with an ingress port and an egress port, and the selected second memory device is associated with a third port that is different than the ingress port or the egress port associated with the packet.