An example programmable integrated circuit (IC) includes a processor, a plurality of endpoint circuits, a network-on-chip (NoC) having NoC master units (NMUs), NoC slave units (NSUs), NoC programmable switches (NPSs), a plurality of registers, and a NoC programming interface (NPI). The processor is coupled to the NPI and is configured to program the NPSs by loading an image to the registers through the NPI for providing physical channels between NMUs to the NSUs and providing data paths between the plurality of endpoint circuits.

A novel and efficient method is described that creates a monolithic high capacity Packet Engine (PE) by connecting N lower capacity Packet Engines (PEs) via a novel Chip-to-Chip (C2C) interface. The C2C interface is used to perform functions, such as memory bit slicing and to communicate shared information, and enqueue/dequeue operations between individual PEs.

A non-transitory machine readable medium storing a program that configures managed forwarding elements to establish tunnels between the managed forwarding elements is described. From a particular managed forwarding element, the program receives information regarding coupling of a network element to the first managed forwarding element. Upon receiving the information, the program generates a set of universal flow entries for configuring another managed forwarding element to establish a tunnel to the particular managed forwarding element.

This application discloses a data processing method and apparatus, and a switching device. The data processing method includes: obtaining a destination address of a data packet received by an input port; determining an available output port based on the destination address; determining a busy degree of the available output port, when there is no non-busy available output port in the available output port, determining a quantity of footprint queues on the available output port, and selecting an available output port with a largest quantity of footprint queues as a target output port; determining a busy degree of a queue on the target output port, and when there is no non-busy queue on the target output port, selecting a footprint queue on the target output port as a target output queue. In the foregoing manners, a network resource is properly used, and network blocking can be effectively alleviated.

Apparatuses, methods and storage medium associated with buffering data in a switch are provided. In embodiments, the switch may include a plurality of queue buffers, a plurality of queues respectively associated with the plurality of queue buffers, a shared buffer, and a queue point controller coupled with the plurality of queue buffers and the shared buffer. In embodiments the queue point controller may be configured to determine an amount of available space in a selected queue buffer of the plurality of queue buffers. The queue point controller may be further configured to allocate at least a portion of the shared buffer to a selected queue that is associated with the selected queue buffer. In embodiments, this allocation may be based on the amount of available space determined in the selected queue buffer. Other embodiments may be described and/or claimed.

The invention relates to a method for transmitting messages in a computer network, and to a computer network of this type. The computer network comprises computing nodes (101-105), said computing nodes (101-105) being interconnected via at least one star coupler (201) and/or at least one multi-hop network (1000), wherein each computing node (101-105) is connected via at least one communication line (110) to the at least one star coupler (201) and/or the at least one multi-hop network (1000), and wherein the computing nodes (101-105) exchange Ethernet messages with one another and with the at least one star coupler (201) and/or the at least one multi-hop network (1000). A set of two or more components are directly connected to one another in each case by two or more communication lines (110, 111), wherein each component in the set is either a computing node (101-105) or a star coupler (201), and sending components in the set of components send to at least two of the two or more communication lines (110, 111) at least a proportion of the Ethernet messages that are to be sent, and receiving components in the set of components then accept and/or forward at least a proportion of the Ethernet messages received via the two or more communication lines (110, 111) only if at least two identical messages are received via at least two different communication lines.

A crossbar switch has N input ports, M output ports, and a switching matrix with N×M crosspoints. In an embodiment, each crosspoint contains an internal queue (XQ), which can store one or more packets to be routed. Traffic rates to be realized between all Input/Output (IO) pairs of the switch are specified in an N×M traffic rate matrix, where each element equals a number of requested cell transmission opportunities between each IO pair within a scheduling frame of F time-slots. An efficient algorithm for scheduling N traffic flows with traffic rates based upon a recursive and fair decomposition of a traffic rate vector with N elements, is proposed. To reduce memory requirements a shared row queue (SRQ) may be embedded in each row of the switching matrix, allowing the size of all the XQs to be reduced. To further reduce memory requirements, a shared column queue may be used in place of the XQs. The proposed buffered crossbar switches with shared row and column queues, in conjunction with the row scheduling algorithm and the DCS column scheduling algorithm, can achieve high throughput with reduced buffer and VLSI area requirements, while providing probabilistic guarantees on rate, delay and jitter for scheduled traffic flows.

A system includes a storage system and circuitry coupled to the storage system. The circuitry is configured to perform operations comprising determining a type of a received data packet, determining a destination of the received data packet, and determining whether the received data packet is of a particular type or has a particular destination. The operations further comprise, responsive to determining that the received data packet is of the particular type or has the particular destination, rerouting the received data packet from the particular destination to a register of the storage system.

A switching device includes a processor, an input buffer, an output buffer, and a Banyan switching architecture, where the processor is configured to convert an initial switching table to a non-congestion switching table and an order-adjustment table using a preset reordering algorithm; the input buffer is configured to save first period data that is from an input port; the processor is further configured to perform, using the non-congestion switching table, data switching on data in the first full-period data saved in the input buffer, to obtain second full-period data; the Banyan switching architecture is configured to perform synchronous data switching on the second full-period data; the output buffer is configured to save the second full-period data on which the synchronous data switching has been performed; the processor is further configured to adjust, using the order-adjustment table, a data order of the second period data.

An address allocation method, a carrier grade network address translation (CGN) device, and a CGN dual-active system, where a second CGN device receives a first to-be-sent packet sent by a network address translation (NAT) device, searches a recorded correspondence between a private network address, a public network address, and a port range for a source address of the first to-be-sent packet, sends an address allocation request used to request a public network address and a port range of the source address to a first CGN device when a search result indicating that no source address of the first to-be-sent packet is found. The first CGN device allocates a public network address and a port range to the source address of the first to-be-sent packet, records the network address and the port range, and synchronies the allocated public network address and the allocated port range to the second CGN device.