A video processing apparatus implemented in a chip includes an on-chip prediction buffer and a processing circuit. The on-chip prediction buffer is shared by a plurality of coding tools for prediction, and is used to store reference data. The processing circuit supports the coding tools for prediction, reads a plurality of first reference data from the on-chip prediction buffer as input data of a first coding tool that is included in the coding tools and enabled by the processing circuit, and writes output data of the first coding tool enabled by the processing circuit into the on-chip prediction buffer as a plurality of second reference data.

A video processing apparatus implemented in a chip includes an on-chip prediction buffer and a processing circuit. The on-chip prediction buffer is shared by a plurality of coding tools for prediction, and is used to store reference data. The processing circuit supports the coding tools for prediction, reads a plurality of first reference data from the on-chip prediction buffer as input data of a first coding tool that is included in the coding tools and enabled by the processing circuit, and writes output data of the first coding tool enabled by the processing circuit into the on-chip prediction buffer as a plurality of second reference data.

A method of and a device for decoding a coded picture coded according to a video codec technology or standard that uses a syntax structure including a Picture Header and at least one Picture Parameter Set (PPS) are provided. The method includes decoding, by a decoder, the Picture Header, the Picture Header including transient information pertaining to a plurality of Coding Units of the coded picture, and the transient information of the Picture Header including at least one reference to the at least one PPS, and further including at least one first syntax element pertaining to an aspect of the video codec technology or standard for decoding. The method further includes activating, by the decoder, a PPS of the at least one PPS that is decoded, the PPS including a second syntax element pertaining to the aspect of the video codec technology or standard for decoding.

A method of and a device for decoding a coded picture coded according to a video codec technology or standard that uses a syntax structure including a Picture Header and at least one Picture Parameter Set (PPS) are provided. The method includes decoding, by a decoder, the Picture Header, the Picture Header including transient information pertaining to a plurality of Coding Units of the coded picture, and the transient information of the Picture Header including at least one reference to the at least one PPS, and further including at least one first syntax element pertaining to an aspect of the video codec technology or standard for decoding. The method further includes activating, by the decoder, a PPS of the at least one PPS that is decoded, the PPS including a second syntax element pertaining to the aspect of the video codec technology or standard for decoding.

A video device to determine picture count information for decoding video pictures is provided. The video device decodes a picture order count (POC) most significant bit (MSB) first flag that indicates whether a POC MSB second flag is present. When the POC MSB second flag is present, the video device decodes the POC MSB second flag indicating whether a POC MSB cycle element is present. When the POC MSB cycle element is present, the video device decodes the POC MSB cycle element that specifies a value of a POC MSB cycle. The value of the POC MSB cycle is used to compute a POC MSB value that is combined with a POC least significant bit (LSB) value to produce a POC value used for decoding a first video picture, and a length of the POC LSB value is based on a maximum POC LSB minus four value.

A method of video processing by a video processor includes receiving a first syntax element in a coded video bitstream. The first syntax element can be a high level syntax element and indicate whether a height of each of a plurality of pictures in a video sequence of the coded video bitstream is equal to or larger than a width of the respective picture in the video sequence of the coded video bitstream. The pictures in the video sequence of the coded video can be processed in an orientation that is determined according to the first syntax element indicating whether the height of each of the plurality of pictures in the video sequence of the coded video is guaranteed to be equal to or larger than the width of the respective picture in the video sequence.

A method and device for controlling coding tools are provided. The video decoding method includes decoding, from a high level of a bitstream, an enable flag indicating whether one or more coding tools are enabled. The coding tools includes a first coding tool that encodes sample values using luma component mapping based on a piecewise linear model. The method includes acquiring a value of an application flag depending on a value of the enable flag, by setting the application flag indicating whether to apply the coding tools to a predetermined value, or by decoding the application flag from a low level of the bitstream, the application flag including a first application flag indicating whether to apply the first coding tool. The coding tools are operated when the value of the application flag is a value indicating that the coding tools are applied.

A method and device for controlling coding tools are provided. The video decoding method includes decoding, from a high level of a bitstream, an enable flag indicating whether one or more coding tools are enabled. The coding tools includes a first coding tool that encodes sample values using luma component mapping based on a piecewise linear model. The method includes acquiring a value of an application flag depending on a value of the enable flag, by setting the application flag indicating whether to apply the coding tools to a predetermined value, or by decoding the application flag from a low level of the bitstream, the application flag including a first application flag indicating whether to apply the first coding tool. The coding tools are operated when the value of the application flag is a value indicating that the coding tools are applied.

The present disclosure relates to systems and methods of multi-processing core processing of image frames during image encoding. The multiple processing cores may be connected via dedicated interfaces and transfer neighbor data between the processing cores to enable parallel processing of frame data. The multiple processing cores may each process quad-rows of image data for a single frame in parallel to reduce memory usage and mitigate latency in video encoding.

The present disclosure relates to systems and methods of multi-processing core processing of image frames during image encoding. The multiple processing cores may be connected via dedicated interfaces and transfer neighbor data between the processing cores to enable parallel processing of frame data. The multiple processing cores may each process quad-rows of image data for a single frame in parallel to reduce memory usage and mitigate latency in video encoding.