A pixel circuit for a ultra-low power image sensor, including: an integration node, on which a photodiode current is integrated, a comparator arranged to compare a voltage at the integration node with a reference voltage, a n+1 bits digital memory, a writing pulse signal generator arranged to generate a writing pulse signal, on the basis of the comparator output voltage and on the voltage at a memory node, the start of the pulse triggering the writing of the digital word in the n-bits digital memory part. The comparator includes a switch in series with a current source and arranged to be commanded by the voltage at the memory node so that the switch is open at the end of the pulse, so as to drastically limit the consumption of static power of the pixel circuit during the integration phase.

A dynamic vision sensor (DVS) or change detection sensor reacts to changes in light intensity and in this way monitors how a scene changes. This disclosure covers both single pixel and array architectures. The DVS may contain one pixel or 2-dimensional or 1-dimensional array of pixels. The change of intensities registered by pixels are compared, and pixel addresses where the change is positive or negative are recorded and processed. Analyzing frames based on just three values for pixels, increase, decrease or unchanged, the proposed DVS can process visual information much faster than traditional computer vision systems, which correlate multi-bit color or gray level pixel values between successive frames.

The invention relates to an image sensor comprising a photodetector array including neighboring photodetector elements, each photodetector element comprising:—a photodetector cell having a photodiode and a reset unit;—a cell control unit coupled with the photodetector cell and configured to reset the photodiode by means of the reset unit; wherein the cell control unit is configured to asynchronously effect resetting of the photodiode after a given dead time after detection of a photon.

Provided is a solid-state imaging apparatus and an electronic device, in which a scale of circuits, to perform arithmetic operation of the neural network, is suppressed. A solid-state imaging apparatus according to an aspect of the present disclosure includes a pixel array unit and a processing unit. The pixel array unit has a plurality of first pixels that generate electric signals, which have a logarithmic characteristic with respect to light quantity, as first pixel signals. The processing unit performs arithmetic processing of the first neural network based on a plurality of first input data, which are based on the plurality of first pixel signals read from the pixel array unit, and a plurality of logarithmic weighting factors which express strength of the connection between the plurality of first nodes by a logarithm.

A digital pixel includes a capacitive transimpedance amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.

A high dynamic range image sensors enabled by integrating broadband optical filters with individual sensor pixels of a pixel array. The broadband optical filters are formed of engineered micro or nanostructures that exhibit large differences in transmittance, e.g. up to 5 to 7 orders of magnitude. Such high transmittance difference can be achieved by using a single layer of individually designed filters, which show varied transmittance as a result of the distinct absorption of various material and structures. The high transmittance difference can also be achieved by controlling the polarization of light and using polarization-sensitive structures as filters. With the presence of properly designed integrated nanostructures, broadband transmission spectrum with transmittance spanning several orders of magnitude can be achieved. This enables design and manufacturing of image sensors with high dynamic range which is crucial for applications including autonomous driving and surveillance.

An imaging device including a pixel array including pixels, each pixel including a photoelectric converter including a first and second electrode, and a first photoelectric conversion layer between the first and second electrode, and a transistor having a gate coupled to the first electrode, the transistor outputting a signal corresponding to an amount of the signal charge collected by the first electrode. The device further including voltage supply circuitry coupled to the second electrode of each of the pixels, where the voltage supply circuitry, in each of consecutive frame periods, supplies a first voltage two or more times to form exposure periods in which the signal charge is collected by the first electrode, and supplies a second voltage one or more times to form non-exposure periods that separate the exposure periods from each other, and start time of each of the exposure periods is periodic over the consecutive frame periods.

An imaging device includes: a photoelectric converter including first and second electrodes, and a photoelectric conversion layer located between the first electrode and the second electrode; a voltage supply circuit applying a bias voltage between the first electrode and the second electrode; an amplifier transistor including a gate electrically connected to the second electrode, the amplifier transistor configured to output a signal corresponding to a potential of the second electrode; and a detection circuit configured to detect a level of the signal from the amplifier transistor. The voltage supply circuit applies the bias voltage in a first voltage range when the level detected by the detection circuit is greater than or equal to a first threshold value, and applies the bias voltage in a second voltage range that is greater than the first voltage range when the level detected by the detection circuit is less than a second threshold value.

An imaging device includes: a pixel including a photoelectric converter that generates signal charge by photoelectric conversion, and a charge accumulation region that accumulates the signal charge, the pixel being configured to output a signal corresponding to a voltage of the charge accumulation region; a signal line electrically connected to the pixel, the signal being transmitted through the signal line; a first switch that is electrically connected to the signal line and that has input-output characteristics in which an output is linear with respect to an input up to a clipping voltage and the output is clipped at the clipping voltage with respect to the input exceeding the clipping voltage; and a second switch that is electrically connected to the signal line and that has input-output characteristics in which an output is linear with respect to an input.

An imaging device including a pixel including: a photoelectric converter including a first electrode, a second electrode, and a first photoelectric conversion layer, the first photoelectric conversion layer generating signal charge, and a transistor having a gate coupled to the first electrode, the transistor outputting a signal corresponding to an amount of the signal charge collected by the first electrode. The imaging device further includes voltage supply circuitry coupled to the second electrode, which, in each of consecutive frame periods, supplies a first voltage two or more times to form exposure periods in which the first signal charge is collected by the first electrode, supplies a second voltage one or more times to form non-exposure periods that separate the exposure periods from each other, and supplies a third voltage in a period when the transistor outputs the signal, and the third voltage is the same between the consecutive frame periods.