H04N25/571

IMAGING DEVICE AND CAMERA SYSTEM, AND DRIVING METHOD OF IMAGING DEVICE

An imaging device includes: a photoelectric converter including first and second electrodes, and a photoelectric conversion layer located between the first electrode and the second electrode; a voltage supply circuit applying a bias voltage between the first electrode and the second electrode: an amplifier transistor including a gate electrically connected to the second electrode, the amplifier transistor configured to output a signal corresponding to a potential of the second electrode; and a detection circuit configured to detect a level of the signal from the amplifier transistor. The voltage supply circuit applies the bias voltage in a first voltage range when the level detected by the detection circuit is greater than or equal to a first threshold value, and applies the bias voltage in a second voltage range that is greater than the first voltage range when the level detected by the detection circuit is less than a second threshold value.

Bit-depth efficient image processing

A computer-implemented method for bit-depth efficient image processing includes a step of communicating at least one non-linear transformation to an image signal processor. Each non-linear transformation is configured to, when applied by the image signal processor to a captured image having sensor signals encoded at a first bit depth, produce a nonlinear image that re-encodes the captured image at a second bit depth that may be less than the first bit depth, while optimizing allocation of bit depth resolution in the nonlinear image for low contour visibility. The method further includes receiving the nonlinear image from the image signal processor, and applying an inverse transformation to transform the nonlinear image to a re-linearized image at a third bit depth that is greater than the second bit depth. The inverse transformation is inverse to the nonlinear transformation used to produce the nonlinear image.

Image sensor, imaging method, and imaging apparatus

There is provided an image sensor comprising: a pixel unit having a plurality of pixels; an A/D converter which converts an image signal from the pixel into a digital image signal; a gradation converter which performs a gradation conversion to the digital image signal; and a selector which selects gradation converting characteristics of the gradation conversion to the digital image signal performed by the gradation converter.

BIT-DEPTH EFFICIENT IMAGE PROCESSING

A computer-implemented method for bit-depth efficient image processing includes a step of communicating at least one non-linear transformation to an image signal processor. Each non-linear transformation is configured to, when applied by the image signal processor to a captured image having sensor signals encoded at a first bit depth, produce a nonlinear image that re-encodes the captured image at a second bit depth that may be less than the first bit depth, while optimizing allocation of bit depth resolution in the nonlinear image for low contour visibility. The method further includes receiving the nonlinear image from the image signal processor, and applying an inverse transformation to transform the nonlinear image to a re-linearized image at a third bit depth that is greater than the second bit depth. The inverse transformation is inverse to the nonlinear transformation used to produce the nonlinear image.

ELECTRONIC DEVICE AND IMAGE CAPTURE METHOD

An electronic device and an image capture method are provided. The electronic device includes an image sensor, a ramp analog to digital converter, and a memory. The image sensor includes a plurality of pixel units arranged in an array, and the pixel units output a plurality of first image capturing signals and a plurality of second image capturing signals in an image capturing operation. The ramp analog to digital converter generates a plurality of most significant bit data corresponding to a plurality of pixels according to a first nonlinear ramp signal and the first image capturing signals, and generates a plurality of least significant bit data corresponding to the plurality of pixels according to a second nonlinear ramp signal and the second image capturing signals. The memory stores the most significant bit data of these pixels and the least significant bit data of these pixels together to generate frame data.

ELECTRONIC DEVICE AND AUTOMATIC EXPOSURE CONVERGENCE METHOD

An electronic device and an automatic exposure convergence method are provided. The electronic device includes an image sensor and a processor. The image sensor is configured to obtain a first frame. The first frame includes a plurality of sub-frame regions, and each of the sub-frame regions includes a plurality of pixel data. The plurality of pixel data are obtained based on different exposure times. The processor is coupled to the image sensor. The processor is configured to analyze the first frame to combine the pixel data having the same exposure times in the sub-frame regions into a plurality of second frames. The processor analyzes the plurality of second frame to obtain a plurality of exposure values. The processor performs an exposure convergence operation based on the plurality of exposure values.

Systems, methods, and media for high dynamic range imaging using dead-time-limited single photon detectors

In accordance with some embodiments, systems, methods and media for high dynamic range imaging using dead-time-limited single photon detectors are provided. In some embodiments, a system for high dynamic range imaging is provided, comprising: an image sensor comprising: a pixels comprising: a single photon detector having dead time .sub.d; and a counter coupled to an output of the single photon detector, wherein the counter is configured to increment in response to a signal indicative of detection of a photon output by the single photon detector; and a processor that is programmed to: read out a value stored by the counter after an exposure time has elapsed; and calculate an intensity for the pixel based on the value and the dead time .sub.d.

Electronic device and automatic exposure convergence method

An electronic device and an automatic exposure convergence method are provided. The electronic device includes an image sensor and a processor. The image sensor is configured to obtain a first frame. The first frame includes a plurality of sub-frame regions, and each of the sub-frame regions includes a plurality of pixel data. The plurality of pixel data are obtained based on different exposure times. The processor is coupled to the image sensor. The processor is configured to analyze the first frame to combine the pixel data having the same exposure times in the sub-frame regions into a plurality of second frames. The processor analyzes the plurality of second frame to obtain a plurality of exposure values. The processor performs an exposure convergence operation based on the plurality of exposure values.

Master-slave system, command execution method and data access method with use of serial peripheral interface (SPI)

A master-slave system, a command execution method, and a data access method are provided. The master-slave system includes a master device and a slave device. The master device provides a first command and a clock signal to the slave device. The slave device executes a first operation corresponding to the first command according to the first command and the clock signal. When the first operation corresponding to the first command is completed, the slave device generates a response signal according to the clock signal to notify the master device an execution result of the first operation corresponding to the first command.

Memory cell

A memory cell including a first transistor, an inverter, and a second transistor is provided. A first terminal of the first transistor serves as a data input terminal of the memory cell. A control terminal of the first transistor receives a write control signal. A second terminal of the first transistor is coupled to a memory node. An input terminal of the inverter is coupled to the memory node. An output terminal of the inverter serves as a data output terminal of the memory cell. A first terminal of the second transistor is coupled to a first voltage. A control terminal of the second transistor is coupled to the output terminal of the inverter. A second terminal of the second transistor is coupled to the memory node. A body of the second transistor is coupled to a second voltage. A voltage value of the second voltage is not equal to a voltage value of the first voltage to reduce a leakage current of the second transistor.