Patent classifications
H04N25/621
IMAGING ELEMENT, STACKED IMAGING ELEMENT, AND SOLID-STATE IMAGING APPARATUS
An imaging element includes a photoelectric conversion unit including a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82, and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13, an absolute value of a potential applied to a part 13.sub.C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13.sub.B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.
SOLID-STATE IMAGING DEVICE AND ELECTRONIC DEVICE
The present technology relates to a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction. The present technology can be applied to a backside-illumination CMOS image sensor, for example.
Solid-state imaging device with pixels having an in-pixel capacitance
The present disclosure relates to a solid-state imaging device and an electronic device capable of effectively preventing blooming. Provided is a solid-state imaging device including: a pixel array portion in which a plurality of pixels is two-dimensionally arranged, in which the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, the in-pixel capacitance being provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, the counter electrode being provided in the semiconductor substrate. The present disclosure can be applied to, for example, a back-illuminated CMOS image sensor.
Solid-state imaging device and method of driving solid-state imaging device
A method of driving a solid-state imaging device includes: setting voltage of an input node of an amplifier unit to a first voltage by using logarithmic compression to convert current generated by charges overflowing from a photoelectric conversion unit to the input node into voltage corresponding to the current, transferring charges from the photoelectric conversion unit to the input node, setting voltage of the input node to a second voltage by converting the charges into voltage corresponding to the charges, at the amplifier unit, outputting a first signal based on the first voltage and a second signal based on the second voltage, performing the logarithmic compression by using a diode connected to the input node, and acquiring, as a reference signal, an output of the amplifier unit when the input node is set to a third voltage defined in accordance with a threshold voltage of the diode.
Pixel sensor having multiple photodiodes
In one example, a pixel cell comprises a first photodiode to generate a first charge and a second photodiode to generate a second charge. The pixel cell may include a charge sensing unit shared between the first photodiode and the second photodiode. The charge sensing unit may include a charge storage device to temporarily store a charge and convert the charge to a voltage. The pixel cell may include a quantizer to quantize the voltage output by the charge sensing unit, and a memory to store the quantization output. Depending on an operation mode, the first charge and the second charge can be controlled to flow simultaneously to the charge sensing unit for read out, or can be controlled to flow separately to the charge sensing unit for read out. The pixel cell further includes a memory to store a quantization result of the first charge and the second charge.
HIGH DYNAMIC RANGE IMAGING PIXELS WITH MULTIPLE PHOTODIODES
A high dynamic range imaging pixel may include first and second photodiodes that generate charge in response to incident light. The second photodiode may have a higher sensitivity than the first photodiode. When generated charge in the first photodiode exceeds a given charge level, the charge may overflow through a transistor to a capacitor. The overflow path from the first photodiode to the capacitor may optionally pass through the floating diffusion region. A transistor may be coupled between the first and second photodiodes. A gain select transistor may be coupled between the floating diffusion region and the capacitor. After sampling the overflow charge, the charge from both the first and second photodiodes may be sampled. In one arrangement, overflow charge may be transferred to a capacitor in a subsequent row.
Small pixel high dynamic range pixel sensor
An imaging array and a pixel sensor are disclosed. One of the pixel sensors in the imaging array includes a photodiode having a cathode connected to an electron storage node and an anode connected to a hole storage node. An overflow path connects the electron storage node via an overflow gate that allows electrons to leak off of the electron storage node into the overflow path if the electron storage node has a potential less than a leakage potential. A floating diffusion node is connected to the electron storage node by a transfer gate and the overflow path by an overflow path gate. A hole storage node reset gate connects the hole storage node to ground. A hole storage capacitor is connected between the hole storage node and ground, and an overflow path coupling capacitor connects the hole storage node to the overflow path.
SMALL PIXEL HIGH DYNAMIC RANGE PIXEL SENSOR
An imaging array and a pixel sensor are disclosed. One of the pixel sensors in the imaging array includes a photodiode having a cathode connected to an electron storage node and an anode connected to a hole storage node. An overflow path connects the electron storage node via an overflow gate that allows electrons to leak off of the electron storage node into the overflow path if the electron storage node has a potential less than a leakage potential. A floating diffusion node is connected to the electron storage node by a transfer gate and the overflow path by an overflow path gate. A hole storage node reset gate connects the hole storage node to ground. A hole storage capacitor is connected between the hole storage node and ground, and an overflow path coupling capacitor connects the hole storage node to the overflow path.
IMAGING DEVICE AND IMAGING SYSTEM
In an imaging device according to the present disclosure, during a period in which a signal from an amplifier transistor is output from a pixel via a select transistor, the gate voltage of the capacitance addition transistor changes frons the first voltage VH to the second voltage VL, and the amount of voltage change per time until the gate voltage changes from the first voltage VH to the second voltage VL is smaller than the amount of voltage change per unit time until the gate voltage changes from the second voltage VL to the first voltage VH.
MULTI-GATE LATERAL OVERFLOW INTEGRATION CAPACITOR SENSOR
A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.