Patent classifications
H04N25/626
Solid state image sensor pixel electrode below a photoelectric conversion film
Provided is a solid state image sensor capable of reducing signal mixture due to electric capacitive coupling between adjacent pixels, a method for manufacturing the same, and an electronic device. A first pixel and a second pixel are adjacently arranged in the solid state image sensor. Each of the first pixel and the second pixel has a photoelectric conversion film for photoelectrically converting an incident light, and a lower electrode arranged below the photoelectric conversion film, and another electrode different from the lower electrodes is provided between the lower electrodes of the first pixel and the second pixel. The present disclosure is applicable to solid state image sensors and the like, for example.
Imaging systems having dual storage gate overflow capabilities
An image sensor pixel may include a photodiode that generates first charge for a first frame and second charge for a second frame, first and second storage gates coupled to the photodiode, a floating diffusion coupled to the first storage gate through a first transistor, a second transistor coupled to the second storage gate, and a capacitor coupled to the floating diffusion through a third transistor. The image sensor pixel may output image signals associated with the first charge generated by the photodiode for the first image frame while the photodiode concurrently generates the second charge for the second image frame. The second storage gate may be used to store overflow charge. Overflow charge for the second frame may be stored at the second storage gate while image signals associated with the first image frame are read out from capacitor and the floating diffusion.
Image Processing Method and Image Processing System Capable of Calibrating Images
An image processing method includes setting a detection panel with an active region, acquiring raw image data by using the detection panel, partitioning the active region into a first region and a second region, discharging at least a part of the electrical charges in the first region by using a particular scanning process, acquiring calibration data through the detection panel, and calibrating the raw image data to generate calibrated image data according to the calibration data.
Image processing apparatus, imaging apparatus, pixel-abnormality detecting method, and computer-readable recording medium
An image processing apparatus includes: a comparing circuit configured to compare, based on image data generated by an imaging element including a light receiver in which a plurality of photoelectric converting elements forms a set of a unit pixel and in which a plurality of unit pixels are arranged in a two-dimensional matrix, and a micro lens that is provided per unit pixel and is layered on a light receiving surface of the unit pixel, output values of the respective photoelectric converting elements per unit pixel to detect an abnormal output; and an estimating circuit configured to estimate an abnormality by using output values of the respective photoelectric converting elements in the unit pixel. The comparing circuit is configured to detect the abnormal output by comparing ratios of output values that are output by the photoelectric converting elements at identical positions in adjacent unit pixels.
IMAGING DEVICE
An imaging device supplies a first constant potential and a second constant potential to a photodiode through a first line and a second line to put the photodiode in a reverse-bias state. The imaging device reads a signal corresponding to the potential at the other end of the photodiode changed by light incident on the photodiode in the reverse-bias state. The imaging device supplies a potential that changes with time to a capacitive element through a control line so that a forward current flows through the photodiode disposed between the capacitive element and the first line after reading the signal.
Solid state imaging device, imaging system, and manufacturing method of solid state imaging device
A solid state imaging device as an embodiment has a first transfer unit that includes a first gate and transfers charges from a photoelectric conversion portion to a holding portion; a second transfer unit that includes a second gate and transfers charges from the holding portion to a floating diffusion portion; and a third transfer unit that includes a third gate and drains charges from the photoelectric conversion portion to the charge draining portion. The impurity concentration of a second conductivity type in at least a part of a region under the first gate of the first transfer unit is lower than the impurity concentration of the second conductivity type in a region under the second gate of the second transfer unit and the impurity concentration of the second conductivity type in a region under the third gate of the third transfer unit.
Solid-state image capture element, driving method, and electronic device
The present disclosure relates to a solid-state image capture element, a driving method, and an electronic device which are enabled to capture a high-quality image. In the solid-state image capture element, at least two or more of the discharge driving units are arranged in series between the photoelectric conversion unit and the discharge unit. During capturing of a still image, when a reset operation of the photoelectric conversion unit is performed in starting exposure of the pixel, driving is performed such that after potentials of all the discharge driving units arranged in series are reduced and the charge remaining in the photoelectric conversion unit is discharged to the discharge unit, the potential of the discharge driving unit on the photoelectric conversion unit side is returned to an original potential first, and then the potential of another discharge driving unit is returned to an original potential. The present technology can be applied to a CMOS image sensor which performs imaging by, for example, a global shutter method.
Hybrid image sensors with improved charge injection efficiency
Imaging apparatus (20) includes a photosensitive medium (22) and a bias electrode (32), which is at least partially transparent, overlying the photosensitive medium. An array of pixel circuits (26) is formed on a semiconductor substrate (30). Each pixel circuit includes a pixel electrode (24) coupled to collect the charge carriers from the photosensitive medium; a readout circuit (75) configured to output a signal indicative of a quantity of the charge carriers collected by the pixel electrode; a skimming gate (48) coupled between the pixel electrode and the readout circuit; and a shutter gate (46) coupled in parallel with the skimming gate between a node (74) in the pixel circuit and a sink site. The shutter gate and the skimming gate are opened sequentially in each of a sequence of image frames so as to apply a global shutter to the array and then to read out the collected charge carriers via the skimming gate to the readout circuit.
SOLID-STATE IMAGE PICKUP DEVICE AND CONTROL METHOD OF SOLID-STATE IMAGE PICKUP DEVICE
A solid-state image pickup device according to an embodiment is a solid-state image pickup device including a first pixel row, a second pixel row, and a third pixel row that are arranged in a horizontal direction. In the solid-state image pickup device, a first control pulse for transferring charges of first accumulation portions of the fourth and sixth CCD registers in a vertical direction perpendicular to the horizontal direction and a second control pulse for transferring charges of second accumulation portions of the fourth and sixth CCD registers in the horizontal direction are input to the fourth and sixth CCD registers such that an Hi period of the first control pulse and an Hi period of the second control pulse do not overlap each other in a timing period in which charges accumulated in the first, second, and third pixel rows are transferred.
Image sensor
An image sensor includes a photoelectric converter to generate charges in response to incident light and to provide the generated charges to a first node, a transfer transistor to provide a voltage of the first node to a floating diffusion node based on a first control signal, a source follower transistor to provide a voltage of the floating diffusion node as a unit pixel output, a correlated double sampler (CDS) to receive the unit pixel output and to convert the unit pixel output into a digital code. The first control signal having first, second, and third voltages is maintained at the second voltage in a period between when the voltage of the first node is provided to the floating diffusion node and when the CDS is provided with the voltage of the first node as the unit pixel output.