In a light detection device, a control unit performs a first charge transfer process for transferring charge generated in a charge generation region to a charge storage region by applying an electric potential to a transfer gate electrode so that a potential energy of a region immediately below the transfer gate electrode is lower than a potential energy of the charge generation region and a first read process for reading an amount of charge stored in the charge storage region. In the first charge transfer process, the control unit applies an electric potential to an overflow gate electrode so that a potential energy of a region immediately below the overflow gate electrode is lower than the potential energy of the charge generation region.

A pixel circuit includes a photodiode configured to photogenerate charge in response to reflected modulated light incident upon the photodiode. A first floating diffusion is configured to store a first portion of charge photogenerated in the photodiode. A first transfer transistor is configured to transfer the first portion of charge from the photodiode to the first floating diffusion in response to a first phase signal. A first storage node is configured to store the first portion of charge from the first floating diffusion. A first decoupling circuit has a first output responsive to a first input. The first input is coupled to the first floating diffusion and the first output is coupled to first storage node. A voltage swing at the first output is greater than a voltage swing at the first input.

Aspects of the present disclosure relate to an image sensor. An example apparatus includes an image sensor including one or more pixels. Each pixel of the one or more pixels includes a photodetector, and the photodetector includes a photosensitive surface including germanium. In some implementations, the photodetector includes a photodiode including an intrinsic silicon layer doped with germanium or including germanium crystals. The intrinsic layer may be between a p− layer and an n− layer not including germanium. The intrinsic layer may be configured to absorb photons of the light received at the intrinsic layer. The light may include one or more reflections of an emitted light for active depth sensing. For example, the emitted light may be frequency modulated and having a first wavelength for indirect time-of-flight depth sensing. Sampling circuits may generate voltages indicating a phase difference between the emitted light and a reflection of the emitted light.

A light reception device of the present disclosure includes: a light-receiving section including pixels two-dimensionally arranged in a matrix, the pixels each including a light-receiving element; a row selector that selects the pixels of the light-receiving section in units of one pixel row or a plurality of pixel rows; a column selector that selects the pixels in one pixel row or a plurality of pixel rows selected by the row selector in pixel units; and a controller that controls the column selector. Then, the controller controls the column selector to select the pixels in the one pixel row or the plurality of pixel rows selected by the row selector in units of regions each including a plurality of pixels as a unit, and read out signals of the pixels for each of the regions. In addition, a distance measuring device of the present disclosure uses a light reception device having a configuration described above.

A sensor includes pixels supported by a substrate doped with a first conductivity type. Each pixel includes a portion of the substrate delimited by a vertical insulation structure with an image sensing assembly and a depth sensing assembly. The image sensing assembly includes a first region of the substrate more heavily doped with the first conductivity type and a first vertical transfer gate completely laterally surrounding the first region. Each of the depth sensing assemblies includes a second region of the substrate more heavily doped with the first conductivity type a second vertical transfer gate opposite a corresponding portion of the first vertical transfer gate. The second region is arranged between the second vertical transfer gate and the corresponding portion of the first vertical transfer gate.

A system for structured light depth computation using single photon avalanche diodes (SPADs) is configurable to, over a frame capture time period, selectively activate the illuminator to perform interleaved structured light illumination operations. The interleaved structured light illumination operations comprise alternately emitting at least a first structured light pattern from the illuminator and emitting at least a second structured light pattern from the illuminator. The system is also configurable to, over the frame capture time period, perform a plurality of sequential shutter operations to configure each SPAD pixel of the SPAD array to enable photon detection. The plurality of sequential shutter operations generates, for each SPAD pixel of the SPAD array, a plurality of binary counts indicating whether a photon was detected during each of the plurality of sequential shutter operations.

In one example, an apparatus comprises a first photodiode, a second photodiode, a first floating diffusion, a second floating diffusion, a quantizer, and a controller. The controller can enable the first photodiode and the second photodiode to generate and accumulate photo charge within an exposure period, and use the quantizer to quantize reset voltages at the first floating diffusion and at the second floating diffusion to generate a first digital reset value and a second digital reset value. After the exposure period ends, the controller can transfer the photo charge from the first photodiode and the second photodiode to, respectively, the first floating diffusion and the second floating diffusion to generate a first signal voltage and a second signal voltage, and quantize the signal voltages into digital signal values using the quantizer. Digital representations can be generated based on the digital reset values and the digital signal values.

In a solid-state imaging element that measures a distance, miniaturization of pixels is facilitated. The solid-state imaging element includes a pixel array unit and a photon number detection unit. In the solid-state imaging element including the pixel array unit and the photon number detection unit, the pixel array unit is provided with a plurality of pixels that generates a predetermined analog signal depending on incidence of a photon and a signal line to which the plurality of pixels is connected in common. Furthermore, in the solid-state imaging element, the photon number detection unit detects the number of photons incident, on the basis of the analog signal transmitted via the signal line.

A depth sensor for measuring a distance to an object and an image signal processor configured to change a binning mode based on ambient light are provided. A method for operating a depth sensor for measuring a distance to an object includes outputting a pixel signal from at least one depth pixel included in a pixel array, generating ambient light information based on an intensity of ambient light outside the depth sensor, the intensity of the ambient light being measured using the pixel signal, and setting a binning mode of the depth sensor to an analog binning mode or a digital binning mode based on the ambient light parameter value.

An image sensor and a camera are provided. The image sensor includes: a demodulation clock generation circuit configured to generate first to fourth demodulation clock signals respectively having first to fourth phases; a demodulation phase selection circuit configured to generate first to fourth pre-demodulation signals based on the first to fourth demodulation clock signals and a random number that changes for each of a plurality of packets; a delay circuit configured to generate a first delay signals, second delay signals, third delay signals and fourth delay signals by delaying the first to fourth pre-demodulation signals by a plurality of delay phases; and a phase mixer configured to generate first to fourth demodulation signals of which phases are changed based on an address that changes for each of the plurality of packets. The first to fourth phases have a phase difference of 90° from each other.