An imaging control device that controls an imaging unit including an imaging element in which a plurality of pixels each including a photoelectric conversion unit and a charge holding unit which holds electric charges to be transferred from the photoelectric conversion unit are two-dimensionally disposed, includes a processor, and the processor is configured to: perform a first control of starting exposure of the plurality of pixels at a first timing and of transferring electric charges accumulated in the photoelectric conversion units of the plurality of pixels by the exposure to the charge holding units at a second timing; perform a second control of reading out signals corresponding to the electric charges transferred to the charge holding units by the first control; and perform a third control as defined herein.

An imaging control device that controls an imaging unit including an imaging element in which a plurality of pixels each including a photoelectric conversion unit and a charge holding unit which holds electric charges to be transferred from the photoelectric conversion unit are two-dimensionally disposed, includes a processor, and the processor is configured to: perform a first control of starting exposure of the plurality of pixels at a first timing and of transferring electric charges accumulated in the photoelectric conversion units of the plurality of pixels by the exposure to the charge holding units at a second timing; perform a second control of reading out signals corresponding to the electric charges transferred to the charge holding units by the first control; and perform a third control as defined herein.

A distributed, parallel, image capture and processing architecture provides significant advantages over prior art systems. A very large array of computational circuits—in some embodiments, matching the size of the pixel array—is distributed around, within, or beneath the pixel array of an image sensor. Each computational circuit is dedicated to, and in some embodiments is physically proximal to, one, two, or more associated pixels. Each computational circuit is operative to perform computations on one, two, or more pixel values generated by its associated pixels. The computational circuits all perform the same operation(s), in parallel. In this manner, a very large number of pixel-level operations are performed in parallel, physically and electrically near the pixels. This obviates the need to transfer very large amounts of pixel data from a pixel array to a CPU/memory, for at least many pixel-level image processing operations, thus alleviating the significant high-speed performance constraints placed on modern image sensors.

The disclosure provides multimode configurable spectrometers, a method of operating a multimode configurable spectrometer, and an optical monitoring system. In one embodiment the multimode configurable spectrometer includes: (1) an optical sensor configured to receive an optical input and convert the optical input to electrical signals, wherein the optical sensor includes multiple active pixel regions for converting the optical input to the electrical signals, and (2) conversion circuitry, having multiple selectable converting circuits, that is configured to receive and convert the electrical signals to a digital output according to a selected one of the selectable converting circuits.

A TDI scanner including a dynamically programmable focal plane array including a two-dimensional array of detectors arranged in a plurality of columns and a plurality of rows, the array being divided into a plurality of banks separated from one another by gap regions, each bank including a plurality of sub-banks, and each sub-bank including at least one row of detectors, a ROIC coupled to the focal plane array and configured to combine in a TDI process outputs from detectors in each column of detectors in each sub-bank, and a controller configured to program the focal plane array to selectively and dynamically set characteristics of the focal plane array, the characteristics including a size and a location within the two-dimensional array of each of the plurality of sub-banks and the gap regions, the size corresponding to a number of rows of detectors included in the respective sub-bank or gap region.

An electronic device that includes a vision system carried by a bracket assembly is disclosed. The vision system may include a first camera module that captures an image of an object, a light emitting element that emits light rays toward the object, and a second camera module that receives light rays reflected from the object. The light rays may include infrared light rays. The bracket assembly is designed not only carry the aforementioned modules, but to also maintain a predetermined and fixed separation between the modules. The bracket assembly may form a rigid, multi-piece bracket assembly to prevent bending, thereby maintaining the predetermined separation. The electronic device may include a transparent cover designed to couple with a housing. The transparent cover includes an alignment module designed to engage a module and provide a moving force that aligns the bracket assembly and the modules to a desired location in the housing.

An image sensor, comprising a pixel region in which a plurality of pixel units are arranged, each pixel unit having first and second photoelectric conversion portions, a first output portion that outputs, outside of the image sensor, a first signal based on a signal from the first photoelectric conversion portion of the pixel units, and a second output portion that outputs a second signal based on a signal from the first photoelectric conversion portion and a signal from the second photoelectric conversion portion of the pixel units, wherein output of the first signal from the first output portion and output of the second signal from the second output portion are performed in parallel.

An apparatus includes an image sensor having a plurality of pixels that form regions of interest (ROIs), analog-to-digital converter (ADC) banks, and multiplexers. Each respective multiplexer is electrically connected to (i) a corresponding ADC bank and (ii) a corresponding subset of the ROIs. The apparatus also includes control circuitry configured to obtain a full-resolution image of an environment by electrically connecting, by way of the multiplexers, each respective ADC bank to the associated respective ROI. The control circuitry is also configured to select a particular ROI based on the full-resolution image and obtain a plurality of ROI images of the particular ROI by (i) electrically connecting, to the particular ROI, a first ADC bank associated with the particular ROI and a second ADC bank associated with another ROI and (ii) digitizing pixels of the particular ROI by way of parallel operation of the first and second ADC banks.

An imaging device having first and second pixels is described. The first pixel includes a first transfer transistor, a first reset transistor, a first amplifier transistor and a first select transistor. The second pixel includes a first photoelectric conversion element, a second transfer transistor, a second reset transistor, a second amplifier transistor and a second select transistor.

An imaging device having first and second pixels is described. The first pixel includes a first transfer transistor, a first reset transistor, a first amplifier transistor and a first select transistor. The second pixel includes a first photoelectric conversion element, a second transfer transistor, a second reset transistor, a second amplifier transistor and a second select transistor.