A pixel sensor element (200) including a photodetector (201) and a storage assembly having N storage arrays (205), each having an input shift register (207) and an output shift register (215) each with a number M of storage cells arranged in a column, and a storage shift register (207) to the output shift register (215). A number N of independently driveable signal transfer regions (203) transfer the signal from the photodetector (201) to a first cell (210) of one of a respective one of the input shift registers (207). A number N of signal read-out regions (219) read the signal from a last cell (217) of a respective one of the output shift registers (215). N is 2 or more. M is 1 or more. P is 1 or more. Image sensors, imaging devices, storage assemblies, and methods are also provided.

An imaging apparatus includes: an infrared light source; and a solid-state imaging device. The solid-state imaging device includes: light receivers that convert incident light from the subject to signal charges; a signal storage that stores the signal charges; a signal drain into which the signal charges are discharged; microlenses disposed on the light receivers; and openings through which the incident light enters the light receivers. The solid-state imaging device reads and discharges the signal charges in response to a signal drain voltage being switched between on and off. Each microlens is disposed such that the center of the microlens is displaced toward the center of the pixel array from the center of the corresponding light receiver, as the position of the microlens is closer to the perimeter of the pixel array. The openings have different shapes according to the positions of the openings in the pixel array.

The photosensitive region includes a first impurity region and a second impurity region having a higher impurity concentration than that of the first impurity region. The photosensitive region includes one end positioned away from the transfer section in the second direction and another end positioned closer to the transfer section in the second direction. A shape of the second impurity region in plan view is line-symmetric with respect to a center line of the photosensitive region along the second direction. A width of the second impurity region in the first direction increases in a transfer direction from the one end to the other end. An increase rate of the width of the second impurity region in each of sections, obtained by dividing the photosensitive region into n sections in the second direction, becomes gradually higher in the transfer direction. Here, n is an integer of two or more.

The photosensitive region includes a first impurity region and a second impurity region having a higher impurity concentration than that of the first impurity region. The photosensitive region includes one end positioned away from the transfer section in the second direction and another end positioned closer to the transfer section in the second direction. A shape of the second impurity region in plan view is line-symmetric with respect to a center line of the photosensitive region along the second direction. A width of the second impurity region in the first direction increases in a transfer direction from the one end to the other end. An increase rate of the width of the second impurity region in each of sections, obtained by dividing the photosensitive region into n sections in the second direction, becomes gradually higher in the transfer direction. Here, n is an integer of two or more.

A pixel array uses two sets of pixels to provide accurate exposure control. One set of pixels provide continuous output signals for automatic light control (ALC) as the other set integrates and captures an image. ALC pixels allow monitoring of multiple pixels of an array to obtain sample data indicating the amount of light reaching the array, while allowing the other pixels to provide proper image data. A small percentage of the pixels in an array is replaced with ALC pixels and the array has two reset lines for each row; one line controls the reset for the image capture pixels while the other line controls the reset for the ALC pixels. In the columns, at least one extra control signal is used for the sampling of the reset level for the ALC pixels, which happens later than the sampling of the reset level for the image capture pixels.

A pixel array uses two sets of pixels to provide accurate exposure control. One set of pixels provide continuous output signals for automatic light control (ALC) as the other set integrates and captures an image. ALC pixels allow monitoring of multiple pixels of an array to obtain sample data indicating the amount of light reaching the array, while allowing the other pixels to provide proper image data. A small percentage of the pixels in an array is replaced with ALC pixels and the array has two reset lines for each row; one line controls the reset for the image capture pixels while the other line controls the reset for the ALC pixels. In the columns, at least one extra control signal is used for the sampling of the reset level for the ALC pixels, which happens later than the sampling of the reset level for the image capture pixels.

A first region includes a plurality of first transfer column regions distributed in a first direction. A second region includes a plurality of second transfer column regions distributed in the first direction. The second region is positioned downstream of the first region in a charge transfer direction in the second transfer section. Lengths in a second direction of the plurality of first transfer column regions are equal. Lengths in the second direction of the plurality of second transfer column regions are longer than the length of the first transfer column region, and increase as the second transfer column region is positioned downstream in the charge transfer direction. A third region is disposed to correspond to the first region and extends along the first direction. A fourth region is disposed to correspond to the second region and extends such that an interval between the fourth region and a pixel region in the second direction increases in the charge transfer direction in response to a change in the lengths of the plurality of second transfer column regions.

Each of pixels disposed in a matrix form on a substrate includes a photoelectric conversion unit that converts incident light into a signal charge, a reading electrode that reads the signal charge from the photoelectric conversion unit, and a vertical transfer electrode that constitutes a vertical transfer unit. A plurality of first pixels, and a plurality of second pixels disposed adjacent to the first pixels are alternately disposed for each row, and also alternately disposed for each column to form a checkered pattern. The reading electrode of each of the pixels is disposed such that a plurality of signal charges read from the identical photoelectric conversion unit contain a dark current generated under the common reading electrode.

A solid-state imaging device includes: an imager including pixels arranged in rows and columns; vertical transfer portions in one-to-one correspondence with columns of the pixels, each of which includes a readout electrode that reads out signal charges generated in the pixels and a transfer electrode that transfers the read-out signal charges in the column direction; and a horizontal transfer portion which transfers, in the row direction, the signal charges transferred by the vertical transfer portions, and outputs the signal charges. The imager is formed by alternately disposing, in the column direction, a first row in which visible light pixels each including a first photoelectric converter that converts visible light into signal charges are arranged adjacent in the row direction and a second row in which infrared light pixels each including a second photoelectric converter that converts infrared light into signal charges are arranged adjacent in the row direction.

A charge-coupled device (CCD) image sensor is provided. The CCD image sensor may include an array of photosensors that transfer charge to multiple vertical CCD shift registers, which then in turn transfer the charge to a horizontal CCD shift register. The horizontal CCD shift register then feeds an output buffer circuit. The output buffer circuit can include multiple output stages, each of which can include a source-follower transistor coupled in series with a current sink transistor and at least one cascode transistor. The current sink transistor may have its gate terminal shorted to ground. In one arrangement, the cascode transistor has a gate terminal that receives a non-zero bias voltage. In another arrangement, the cascode transistor has a gate terminal that is also shorted to ground and operates in depletion mode.