Provided is an image sensor having a pixel region including a plurality of pixel blocks disposed in a matrix form, outer address markers around the pixel region, interspaces between the plurality of pixel blocks, and inner address markers disposed in the interspaces.

An imaging device includes: first and second pixel cells each including a photoelectric converter and a transistor electrically connected to the photoelectric converter, the transistor having a control terminal; a first buffer circuit having a first input terminal and a first output terminal, the first buffer circuit receiving a signal for controlling the transistor of the first pixel cell; a second buffer circuit having a second input terminal and a second output terminal, the second buffer circuit receiving a signal for controlling the transistor of the second pixel cell; a first control signal line connecting the first output terminal to the control terminal of the first pixel cell; and a second control signal line connecting the second output terminal to the control terminal of the second pixel cell. The first control signal line and the second control signal line are connected to each other.

A driver includes a first level shifting unit generating a second signal swinging in a second threshold range in response to a first signal swinging in a first threshold range, a second level shifting unit generating a third signal swinging in a third threshold range in response to the second signal, a first pull-up driving unit driving an output terminal with a first high-voltage in response to the second signal, a first pull-down driving unit driving the output terminal with a first low voltage in response to the third signal, a second pull-down driving unit driving the output terminal with a second low voltage higher than the first low voltage in response to the fourth signal, and a first path coupling unit coupling the second pull-down driving unit with the output terminal in response to the second signal.

An input sensing device includes: sensor pixels, a horizontal driver, a selection circuit, and a vertical driver. Each of the sensor pixels is connected to a plurality of driving lines and a one of a plurality of signal input lines. The horizontal driver sequentially applies a horizontal driving signal to the sensor pixels through the driving lines. The selection circuit is connected to n of the signal input lines (n is a natural number of 2 or more) and to one output line. The selection circuit sequentially outputs n sensing signals received through the n signal input lines to the one output line. The vertical driver receives the n sensing signals through the one output line. The horizontal driver applies the horizontal driving signal n times to a given one of the driving lines to correspond to the n sensing signals.

Provided is an imaging apparatus, including: a driving circuit switching between a current supplying state and a current non-supplying state of the current sources included in column circuits in the respective columns; at least one second readout line to which image signals output from the column circuits in the respective columns are input; switches each having one terminal and another terminal; and a switch control circuit configured to output switch control signals for respectively controlling the switches to be turned on or off, each of the one terminals being connected to corresponding second readout line and each of the another terminals being connected commonly to an output line, in which, in a period in which the switch control signals for respectively controlling the switches to be turned on are output, the number of the current sources controlled to be in the current supplying state by the driving circuit is constant.

The present invention belongs to the technical field of CMOS image sensors, and particularly relates to an on-chip multiplexing pixel control circuit for controlling a super-large area array splicing CMOS image sensor. The multiplexing type pixel control circuit includes at least one multiplexing unit, each multiplexing unit includes L levels of serial pixel control sub-circuits and a windowing address gating circuit. Through the different positions of the multiplexing units in the whole chip, the group address buffer circuits of the multiplexing units generate different group address reference signals, which are compared with a group decoding address generated in a group decoding address buffer circuit to realize group decoding and gate the multiplexing unit. Meanwhile, the serial pixel control sub-circuit in the multiplexing unit is compared with a row decoding address to realize exposure and readout control of a corresponding row of the multiplexing unit. The control circuit of the present invention is simple in structure and reliable in control, and has excellent expandability and multiplexing capability, which can be applied to CMOS image sensor chip circuits with different area array scales.

A photon counting device includes a plurality of pixels each including a photoelectric conversion element configured to convert input light to charge, and an amplifier configured to amplify the charge converted by the photoelectric conversion element and convert the charge to a voltage, an A/D converter configured to convert the voltages output from the amplifiers of the plurality of pixels to digital values; and a conversion unit configured to convert the digital value output from the A/D converter to the number of photons by referring to reference data, for each of the plurality of pixels, and the reference data is created based on a gain and an offset value for each of the plurality of pixels.

Provided is an imaging device including row drive unit having a first storage unit that stores and outputs a first signal for a readout from the pixels on an associated row, a second storage unit that stores and outputs a second signal for an operation for causing the photoelectric conversion element on an associated row to be reset to a charge accumulation state, and a third storage unit that stores and outputs a third signal for maintaining the photoelectric conversion element on an associated row in a charge accumulation state or a reset state based on the first signal output from the first storage unit and the second signal output from the second storage unit.

Solid-state imaging devices, methods of driving solid-state imaging devices, and electronic devices are disclosed. In one example, a solid-state imaging device includes a pixel array unit in which pixels are two-dimensionally arranged in a matrix. At least some pixel rows include a first signal line configured to transmit a drive signal for driving a first transfer transistor of a first pixel in units of microlenses having a color filter of a first color, a second signal line configured to transmit a drive signal for driving a second transfer transistor of a second pixel different from the first pixel, and a third signal line configured to transmit a drive signal for driving a third transfer transistor of a third pixel in units of microlenses having a color filter of a second color different from the first color.

The present disclosure provides a photoelectric conversion apparatus which includes a semiconductor substrate, signal output units disposed on the semiconductor substrate, a plurality of photoelectric conversion layers disposed on a surface of the substrate, and an upper electrode in this order. The photoelectric conversion apparatus further includes insulation layers which are disposed between the plurality of photoelectric conversion layers and which have lines connected to power supply units. The upper electrode and the lines are electrically connected to each other on side surfaces of the insulation layers.