Image quality is to be increased by a compound-lens type imaging apparatus. Lines each having pixels arranged in a predetermined direction are arranged on the light receiving surface. The pixels each generate a pixel signal by performing exposure when supplied with an exposure start signal. First and second lenses form first and second images that partially overlap at overlapping portions on the light receiving surface. A scanning unit supplies the exposure start signal to a line sequentially selected in the overlapping portion of the first image among the lines, and the line corresponding to the selected line in the overlapping portion of the second image. A combining unit combines images formed from pixel signals into one image.

An image sensing device includes a pixel circuit, a readout circuit, and a row driver. The pixel circuit is configured to output a pixel signal in response to a selection signal. The readout circuit is configured to output a digital signal corresponding to the pixel signal, generate a gain control signal based on a first pixel signal received from the pixel circuit, provide the gain control signal to the pixel circuit, receive a second pixel signal output by the pixel circuit using the gain control signal, and output a digital signal corresponding to the second pixel signal. The row driver is configured to provide the selection signal to the pixel circuit while maintaining the selection signal at a first level while the readout circuit provides the gain control signal to the pixel circuit and the pixel circuit outputs the second pixel signal to the readout circuit.

A dual mode image sensor is provided. The image sensor includes an on-chip sensing array, on-chip analog-to-digital converters, and an on-chip processor. The sensor array has rows and columns of discrete sensor elements. The dual mode image sensor has a scene sensing mode and an image capture mode, which use the same set of imaging optics. The processor includes a dual context register; one being for the scene sensing mode and the other for image capture mode. The scene sensing mode is configured to output results of object sensing, motion detection, focus evaluation and illumination measurement to the analog-to-digital converters. The image capture mode is configured to output captured images to the analog-to-digital converters, which are configured to send the digital data to the processor. The processor is configured to switch from scene sensing mode to image capture mode based upon the scene sensing mode output results.

A CMOS image sensor for a camera assembly is provided, having a sensor die with opposing faces, an upper face, and a lower face. On the upper face, the sensor die is provided with a sensor array, an analog-to-digital conversion module, a digital logic circuit, and a timing and clock control circuit. The sensor array is substantially centered on the sensor die. The analog-to-digital conversion module is split into two submodules. Each submodule is disposed adjacent to the sensor array and positioned on opposing sides of the sensor array. The digital logic circuit forms a first row. The timing and clock control circuit and the analog signal processing circuit are adjacent and form a second row. The first and second rows have similar dimensions and are disposed on opposite sides of the sensor array.

A solid-state imaging device includes a first chip including a plurality of pixels, each pixel including a light sensing unit generating a signal charge responsive to an amount of received light, and a plurality of MOS transistors reading the signal charge generated by the light sensing unit and outputting the read signal charge as a pixel signal, a second chip including a plurality of pixel drive circuits supplying desired drive pulses to pixels, the second chip being laminated beneath the first chip in a manner such that the pixel drive circuits are arranged beneath the pixels formed in the first chip to drive the pixels, and a connection unit for electrically connecting the pixels to the pixel drive circuits arranged beneath the pixels.

An imaging device with low power consumption is provided. The imaging device includes pixels and an A/D converter circuit. The pixels have a function of holding first imaging data and a function of obtaining differential data between the first imaging data and second imaging data. The A/D converter circuit includes a comparator circuit and a counter circuit. When the output of the pixels corresponds to the differential data, the supply of a clock signal to the counter circuit is stopped.

An imaging device includes. a first terminal to which a first voltage is applied; a second terminal to which a second voltage different from the first voltage is applied; a voltage generator generating a ramp voltage which is a voltage varying with time; a first switching circuit connected to the second terminal and the voltage generator; a second switching circuit connected to the first terminal and the first switching circuit, and pixels each including a photoelectric converter generating a signal, and a signal detection circuit detecting the signal, at least one of the pixels connected to the second switching circuit. The first switching circuit selectively connects one of the second terminal and the voltage generator with the second switching circuit. The second switching circuit selectively connects one of the first voltage terminal and the first switching circuit with the at least one of the pixels.

An imaging device that facilitates pooling processing. A pixel region includes a plurality of pooling modules and an output circuit, the pooling module includes a pooling circuit and a comparison module, the pooling circuit includes a plurality of pixels and an arithmetic circuit, and the comparison module includes a plurality of comparison circuits and a determination circuit. The pixel can obtain a first signal through photoelectric conversion, and can multiply the first signal by a given scaling factor to generate a second signal. The pooling circuit adds a plurality of second signals in the arithmetic circuit to generate a third signal, the comparison module compares a plurality of third signals and outputs the largest third signal to the determination circuit, and the determination circuit determines the largest third signal and binarizes it to generate a fourth signal. In the imaging device, the pooling module performs pooling processing in accordance with the number of pixels and outputs data obtained by the pooling processing.

Disclosed is a ramp signal generator including a resistance circuit coupled to a first voltage terminal and an output terminal and adjusting, according to a plurality of control signals, a resistance value applied to the output terminal, a ramp signal being output through the output terminal, and a current circuit coupled to a second voltage terminal and the output terminal and for adjusting, according to a clock signal, a current level applied to the output terminal and a change rate of the current level, wherein the plurality of control signals are generated according to an analog gain having a multiple range, and wherein the clock signal has a first frequency when the analog gain has a first range within the multiple range and has a second frequency when the analog gain has a second range within the multiple range.

In various embodiments, an image sensor and related methods of operation of the image sensor are disclosed. In an embodiment, an image sensor includes at least one pixel. The at least one pixel including a transistor to couple an overflow capacitor to a floating diffusion node. Under a low light condition, photocharge is to be collected in a floating diffusion, but substantially not into an overflow node. Under a high light condition, photocharge is to overflow into the overflow node. Other sensors and related operations are disclosed.