An imaging apparatus including an exchangeable lens and a camera body. The camera body transmits a synchronizing signal having the same cycle as the cycle of the capturing operation in the imaging unit, to the interchangeable lens. The controller of the exchangeable lens performs a zoom tracking control by determining the focus position of the focus lens from the position of the zoom lens detected by the position detector by referring to the relation information, and controlling the focus lens driver to move the focus lens to the determined focus position, The controller performs the zoom tracking control in a cycle (for example, one-eighth) shorter than a cycle indicated by the synchronizing signal received from the camera body.

A sensor system includes a sensor array configured to include a first sensor and a second sensor, the first sensor detecting with a first sensitivity a variation in a quantity of light at a first pixel address, the second sensor detecting with a second sensitivity a variation in a quantity of light at a second pixel address, the second pixel address being adjacent to or coinciding with the first pixel address, the second sensitivity being lower than the first sensitivity, and an event signal processing section configured to output information indicative of a difference between times at which the first sensor and the second sensor each have generated an event signal in response to a luminance variation event.

An array sensor and a method for forming and operating the same are provided. The array sensor includes: a sensor circuit including an array of pixel units that includes N rows of pixel units; and a driving circuit including at least N rows of shifting units; where the driving circuit further includes: a first global clearing signal line connected with odd rows of shifting units, a signal of which being applied to trigger the odd rows of shifting units to simultaneously turn on odd rows of pixel units, so that the odd rows of pixel units simultaneously discharge residual charge; and a second global clearing signal line connected with even rows of shifting units, a signal of which being applied to trigger the even rows of shifting units to simultaneously turn on even rows of pixel units, so that the even rows of pixel units simultaneously discharge residual charge.

A high dynamic range imaging pixel may include a photodiode that generates charge in response to incident light. When the generated charge exceeds a first charge level, the charge may overflow through a first transistor to a first storage capacitor. When the generated charge exceeds a second charge level that is higher than the first charge level, the charge may overflow through a second transistor. The charge that overflows through the second transistor may alternately be coupled to a voltage supply and drained or transferred to a second storage capacitor for subsequent readout. Diverting more overflow charge to the voltage supply may increase the dynamic range of the pixel. The amount of charge diverted to the voltage supply may therefore be updated to control the dynamic range of the imaging pixel.

A clock control circuit of an ADC includes a plurality of fractional divider circuits, each including a programmable integer divider coupled to receive an enable skew signal, a clock signal, and an output integer signal to divide down the clock signal by a factor responsive to the output integer signal to generate a fractional divider signal. A delta-sigma modulator is coupled to receive a fractional modulus signal, an input integer signal, and the fractional divider signal to generate the output integer signal, which is a varying signal each cycle and having a long term average DC value substantially equal to a fractional divider ratio K. An extended gain control circuit is coupled to receive the fractional divider signal from each of the fractional divider circuits to generate a plurality of ramp clock signals with adjustable frequencies to adjust a gain setting of a ramp generator of the ADC.

A global shutter (GS) image sensor pixel includes a pinned photodiode connected to a memory node by a first transfer gate transistor, and a floating diffusion connected to the memory node by a second transfer gate transistor. The memory node includes a buried channel portion disposed under the first transfer gate transistor and a contiguous pinned diode portion disposed between the first and second transfer gate transistors, where the two memory node portions have different doping levels such that an intrinsic lateral electrical field drives electrons from the buried channel portion into the pinned diode portion. The floating diffusion node similarly includes a buried channel portion disposed under the second transfer gate transistor and a contiguous pinned diode portion that generate a second intrinsic lateral electrical field that drives electrons into the pinned diode portion of the floating diffusion. A 6T CMOS pixel is disclosed that facilitates low-noise CDS readout.

An imaging apparatus includes an imaging unit that captures an image of a subject and outputs imaging signals; an image signal generation unit that generates image signals indicative of images to be displayed in respective lines of a display unit based on the imaging signals, and outputs the generated image signals to the display unit; and a timing control unit that controls timings, in which the image signal generation unit outputs the image signals, based on an output completion signals indicative of lines corresponding to the image signals, which are completely output from the image signal generation unit to the display unit, and write completion signals indicative of lines corresponding to the image signals which are generated by the image signal generation unit.

A pixel output level control device may include: a pixel output level control unit suitable for controlling a pixel output level of a pixel signal of a pixel for reducing the time required for settling the pixel signal during a specific period; and a pixel output level retention unit suitable for maintaining the pixel output level of the pixel signal during the specific period to a fixed value, according to control of the pixel output level control unit.

An imaging apparatus including a pixel, a current source, and a signal processing circuit. The pixel outputs signal charge, obtained by imaging, as a pixel signal. The current source is connected to a transmission path for the pixel signal and has a variable current. The signal processing circuit performs signal processing on a signal depending on an output signal to the transmission path and performs control so that a current of the current source is changed in accordance with the result of signal processing.

An imaging sensor includes multiple light-receiving elements, which are for multiple colors, configured to conduct photoelectric conversion and multiple power supply lines configured to supply a power supply voltage from a power supply source to the light-receiving elements. The light-receiving elements of each of the colors are aligned in one direction. Portions extending between the power supply source and the respective light-receiving elements of the multiple power supply lines are substantially identical in shape on at least a per-color basis.