There is provided a pixel circuit including a first circuit and a second circuit. The first circuit is used to output a first voltage associated with exposure intensity. The second circuit is used to output a second voltage associated with exposure time interval. The processor multiples the first voltage to a ratio between a reference voltage and the second voltage to obtain an actual light intensity, wherein the reference voltage is a voltage value outputted by the second circuit of a dummy pixel.

Provided are an imaging element, a distance measuring device, and an electronic device capable of improving resolution of a distance image while preventing generation of electromagnetic noise.

An imaging element according to the present disclosure includes: a signal generator configured to generate a clock signal; a plurality of flip-flops connected in a cascade manner; a circuit block configured to supply a first signal to a clock terminal of each of the plurality of flip-flops and to supply a second signal to an input terminal of a first-stage flip-flop of the plurality of flip-flops in accordance with the clock signal; and a pixel array including pixels configured to be driven using pulse signals supplied from different stages of the plurality of flip-flops.

An imaging device according to an embodiment of the present disclosure includes: a first substrate; a second substrate; and a through wiring line. The first substrate includes a photoelectric conversion section and a first transistor in a first semiconductor substrate. The photoelectric conversion section and the first transistor are included in a sensor pixel. The second substrate is stacked on the first substrate and includes a second transistor and an opening that extends through a second semiconductor substrate. The second substrate has an adjuster on at least one of a side surface of the opening near a gate of the second transistor or a region of a surface opposed to the first transistor. The second transistor is included in the sensor pixel. The adjuster adjusts a threshold voltage of the second transistor. The through wiring line is in the opening and electrically couples the first substrate and the second substrate.

An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.

An imaging apparatus, comprising: a signal processing unit reads pixel signals from a plurality of pixel circuits during a predetermined time, and stores at least first image data corresponding to a first frame which corresponds to a first exposure time, second image data corresponding to a second frame which corresponds to a second exposure time that is different from the first exposure time, and third image data corresponding to a third frame which corresponds to a third exposure time that is different from the second exposure time, a computing unit generates a first image using the image data corresponding to the first frame and third frame, and generates a second image using the image data corresponding to the second frame, wherein the exposure for the second frame is performed between the exposure for the first frame and the exposure for the third frame.

The photoelectric conversion device includes pixels each including photoelectric converters and a floating diffusion to which charges of the photoelectric converters are transferred, a vertical scanning unit for performing readout processing and reset processing on the pixels while switching the photoelectric converter to be processed and the floating diffusion to be processed, and a control unit that controls the vertical scanning unit. The control unit includes a readout row address generation unit and a reset row address generation unit that generate a row address to be processed. A first cycle in which the photoelectric converter is switched is shorter than a second cycle in which the floating diffusion is switched, an update cycle of the row address is equal to the second cycle, and a setting unit of an update timing of the row address is equal to the length of one cycle of the first cycle.

An image capturing apparatus comprises a first generation circuit that generates a first synchronization signal with a predetermined cycle, a second generation circuit that generates a second synchronization signal for controlling timings for driving an image sensor including timings for repeatedly reading out image signals from the image sensor, a control circuit that controls the second generation circuit in accordance with a driving method of the image sensor, a selector that selects the first synchronization signal or the second synchronization signal in accordance with the driving method of the image sensor and outputs the selected synchronization signal, and a display panel that updates and displays image signals which are repeatedly read out from the image sensor at timings based on the synchronization signal selected by the selector.

A ramp voltage generator includes: a ramping cell array including a plurality of ramping current cells; a calibration cell array including a plurality of calibration current cells; and a current-voltage converter suitable for converting a current supplied from activated ramping current cells among the ramping current cells and activated calibration current cells among the calibration current cells into a voltage to generate a ramp voltage.

The present disclosure relates to a semiconductor element, a manufacturing method of a semiconductor element, and an electronic apparatus, which enable suppression of crack occurrences and leaks. The present technology has a laminated structure including an insulating film having a CTE value between those of metal and Si and disposed under a metal wiring, and P—SiO (1 μm) having good coverage and disposed as a via inner insulating film in a TSV side wall portion. As the insulating film having a CTE that is in the middle between those of metal and Si, for example, SiOC is used with a thickness of 0.1 μm and 2 μm respectively in the via inner insulating film and a field top insulating film continuous to the via inner insulating film. The present disclosure can be applied to, for example, a solid-state imaging element used in an imaging device.

The present invention relates to an optical biometric sensor comprising: a read-out circuitry controllable for converting analog sensing signals to digital signals, the analog sensing signals being indicative of an image acquired by an image sensor comprising an array of photodetectors; and a timing circuitry configured to control the read-out circuitry to provide digital signals based on a present data transfer capacity on a data transfer bus configured to transfer data indicative of the digital signals from the optical biometric sensor to a host device.