This patent provides a method and apparatus for acquiring imagery with improve spatial resolution through an apparatus called a “light painting imaging device”. Other aspects of this invention correct for barrel distortion and pincushion distortion.

Provided is a semiconductor element capable of inspecting a plurality of wires formed in parallel. A semiconductor element according to an embodiment includes: a first circuit (45B) connected to a first position of each of a plurality of wires of a first wire group (31) including the plurality of wires; a second circuit (45A) connected to a second position corresponding to an end of each of the plurality of wires; and a plurality of connection units (43) that connects a third circuit (14) with each of the plurality of wires, the plurality of connection units (43) being provided on a one-to-one basis to the plurality of wires between the first position and the second position of each of the plurality of wires.

Some embodiments provide an apparatus and method wherein the non-linearity of the response of a multi-bit QIS is controllable (e.g., selectively variable) by dynamically choosing the bit depth n during A/D conversion, and/or later (i.e., post-conversion) by firmware and/or software.

Some embodiments provide an apparatus and method wherein the non-linearity of the response of a multi-bit QIS is controllable (e.g., selectively variable) by dynamically choosing the bit depth n during A/D conversion, and/or later (i.e., post-conversion) by firmware and/or software.

Solid-state imaging elements are disclosed. In one example, an upstream circuit block generates a predetermined reset level and a plurality of signal levels each corresponding to an exposure amount, and causes capacitive elements, different from each other, to hold them. A selection circuit sequentially performs control to connect the capacitive element in which the reset level is held to a predetermined downstream node, control to disconnect capacitive elements from the downstream node, and control to connect the capacitive element in which any of the plurality of signal levels is held to the downstream node. A downstream reset transistor initializes a level of the downstream node when the capacitive elements are disconnected from the downstream node. A downstream circuit sequentially reads the reset level and the plurality of signal levels via the downstream node

An event-driven sensor including: a pixel array; a column readout circuit coupled to column output lines of the pixel array, the column readout circuit including a plurality of column register cells; and a row readout circuit including a readout memory having a storage location corresponding to each pixel of the pixel array, the readout memory having sets of one or more row lines for writing to rows of memory locations of the readout memory, wherein each row output line of the pixel array is coupled, via a corresponding row line control circuit, to a corresponding one of the sets of one or more row lines of the readout memory.

An event-driven sensor including: a pixel array; a column readout circuit coupled to column output lines of the pixel array, the column readout circuit including a plurality of column register cells; and a row readout circuit including a readout memory having a storage location corresponding to each pixel of the pixel array, the readout memory having sets of one or more row lines for writing to rows of memory locations of the readout memory, wherein each row output line of the pixel array is coupled, via a corresponding row line control circuit, to a corresponding one of the sets of one or more row lines of the readout memory.

An event-driven sensor including: a pixel array; a column readout circuit coupled to column output lines of the pixel array, the column readout circuit comprising a plurality of groups of column register cells coupled in series with each other to propagate a first flag signal, wherein each column register cell is configured to activate a column event output signal when it receives the first flag signal while the detection of an event is indicated on the column output line; and a first bypassing circuit for each group of column register cells, the first bypassing circuits being coupled in series with each other to propagate the first flag signal.

An event-driven sensor including: a pixel array; a column readout circuit coupled to column output lines of the pixel array, the column readout circuit comprising a plurality of groups of column register cells coupled in series with each other to propagate a first flag signal, wherein each column register cell is configured to activate a column event output signal when it receives the first flag signal while the detection of an event is indicated on the column output line; and a first bypassing circuit for each group of column register cells, the first bypassing circuits being coupled in series with each other to propagate the first flag signal.

A Complementary Metal Oxide Semiconductor (CMOS) Image Sensor (CIS), includes a pixel circuit, a VSL circuit, and an amplifier. The pixel circuit may generate a reset voltage and a signal voltage, based on a power supply connected to the pixel circuit and/or intensity of light captured by the pixel circuit. The VSL circuit may store pixel information in a pixel load based on settling a voltage at the pixel load to the signal voltage and/or set the voltage at the pixel load to a pixel reset voltage based on settling the voltage at the pixel load to the reset voltage. The amplifier may generate a voltage, based on varying a resistance at an input of the amplifier, to enable the VSL circuit to store the pixel information and/or set the voltage at the pixel load to the pixel reset voltage.