Patent classifications
H04N25/7795
HIGH-SPEED AND LOW-POWER ANALOG-TO-DIGITAL CONVERTER AND CMOS IMAGE SENSOR USING THE SAME
An ADC includes: a ramp signal selector suitable for selecting a ramp signal selector suitable for selecting a rising half ramp signal or falling half ramp signal according to a ramping direction detection result from a ramping direction detector; a comparator suitable for outputting an initial comparison result signal by initially comparing a half ramp signal and a pixel signal, and outputting a comparison result signal by comparing the rising or falling half ramp signal selected through the ramp signal selector to the pixel signal; the ramping direction detector suitable for detecting a ramping direction according to the initial comparison result signal from the comparator; and a data converter suitable for deciding an initial bit according to the initial comparison result signal from the comparator, and performing data conversion according to the comparison result signal from the comparator.
Solid-state imaging device using repeater circuits to hold phase information
A solid-state imaging device including: a pixel array unit in which a plurality of pixels outputting an analog pixel signal are arranged in a two-dimensional matrix form; a ramp signal generation unit configured to generate and output a ramp wave; a clock generation unit configured to generate and output multiphase clocks; and a signal-processing unit, wherein the signal-processing unit including: a plurality of analog-to-digital conversion circuits, and a plurality of repeater circuits, wherein each of the plurality of analog-to-digital conversion circuits includes: a comparison unit, and a latch unit, wherein each of the plurality of the analog-to-digital conversion circuits outputs the digital value according to the state of the phase held by each latch circuit, and wherein each of the plurality of the repeater circuits corresponding to the same set are arranged side by side, and the repeater circuits are connected in series.
Image adjustment apparatus and image sensor for synchronous image and asynchronous image
Disclosed is an image adjustment apparatus including a receiver which is configured to receive a first input image of an object which is time-synchronously captured and a second input image in which a motion event of the object is sensed time-asynchronously, and an adjuster which is configured to adjust the first input image and the second input image.
IMAGING DEVICE, ENDOSCOPE SYSTEM, AND SIGNAL-PROCESSING METHOD
An imaging device includes pixels, a sampling circuit, a reference signal generation circuit, a comparator, a measurement circuit, and a voltage adjustment circuit. The sampling circuit is configured to sample an analog signal. The comparator is configured to compare a voltage of the analog signal with a voltage of the reference signal. The reference signal generation circuit is configured to generate the reference signal that has a first voltage in a first period and has a second voltage in a second period. The measurement circuit is configured to measure the length of a period until the voltage of the analog signal and the voltage of the reference signal match each other. The voltage adjustment circuit is configured to adjust an analog voltage provided to the reference signal generation circuit such that a value of the first voltage nears a value of the second voltage.
Light detecting device and electronic apparatus including shared reset and amplification transistors
A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
Image sensing device with gate dielectric portion varying thickness that increases along migration path of photocharges
An image sensing device is provided to include: a substrate including a photoelectric conversion layer configured to generate photocharges corresponding to the intensity of incident light; a plurality of doping regions disposed along a migration path of the photocharges and doped with dopants in different doping concentrations; and a gate dielectric layer disposed over the substrate and having a gate dielectric layer portion overlapping the plurality of doping regions, the gate dielectric layer portion having a varying thickness that increases along the migration path of the photocharges.
IMAGE SENSOR PREVENTING IMAGE DEGRADATION
Disclosed is an image sensor. Each of a plurality of pixels includes a photo diode, a transfer transistor connected between the photo diode and a floating diffusion node, a reset transistor connected between the floating diffusion node and a first power node to which a first power supply voltage is applied, a first source follower transistor including a gate connected to the floating diffusion node, a first terminal connected to a second power node to which a second power supply voltage is applied, and a second terminal connected to a first node, a precharge transistor connected between the first node and a floating node, a first precharge select transistor connected between the floating node and a ground node, a second precharge select transistor connected between the first node and a second node, and a first capacitor connected between a gate of the precharge transistor and the floating node.
Imaging apparatus and electronic device
Provided are an imaging apparatus and an electronic device for suppressing a delay of a control signal according to a position of a pixel in a horizontal direction. A time code generation unit is provided on a first side of a pixel array, a signal processing unit is provided on a second side, of the pixel array, opposite to the first side, a timing generation circuit is provided on the second side of the pixel array, each of a plurality of transfer units is disposed from the first side to the second side through the pixel array, and a control line for transferring a timing signal generated by the timing signal generation unit to the time code generation unit is provided in each of two or more transfer units of the plurality of transfer units.
PIXEL COLLECTION CIRCUIT, OPTICAL FLOW SENSOR, AND OPTICAL FLOW AND IMAGE INFORMATION COLLECTION SYSTEM
The present disclosure provides a pixel collection circuit which at least includes a photoelectric detection unit, an optical flow information timing trigger unit, an optical flow information timing control unit, an optical flow information timing unit and a row selection output unit. The present disclosure further provides an optical flow sensor including the pixel collection circuit, and an optical flow and image information collection system.
IMAGING DEVICE AND ANALOG-TO-DIGITAL CONVERSION CIRCUIT
An imaging device of the present disclosure includes a first pixel circuit and a generation circuit. The first pixel circuit includes a first light-receiving circuit, a first comparator, a first control circuit, and a first latch circuit. The first light-receiving circuit is configured to generate a first pixel signal corresponding to the amount of received light. The first comparator is configured to generate a first comparison signal by comparing the first pixel signal with a first reference signal having a ramp waveform. The first control circuit is configured to generate a first comparison output signal by turning on and off an output of the first comparison signal on the basis of a first control signal. The first latch circuit is configured to latch a time code on the basis of transition of the first comparison output signal. The generation circuit is configured to generate the first control signal.