Various embodiments of the present technology provide a method and apparatus for an image sensor. In various embodiments, the apparatus provides a driver circuit connected to a plurality of electrically distinct pixel groups to provide the pixel groups with a control signal. A delay measurement circuit is connected to the driver circuit and at least one of the pixel groups to measure a time delay of the control signal. A row control circuit is connected to the delay measurement circuit to receive the measured time delay and, in turn, deliver, via the driver circuit, the control signal to all pixel groups in a single row substantially simultaneously.

Various embodiments of the present technology provide a method and apparatus for an image sensor. In various embodiments, the apparatus provides a driver circuit connected to a plurality of electrically distinct pixel groups to provide the pixel groups with a control signal. A delay measurement circuit is connected to the driver circuit and at least one of the pixel groups to measure a time delay of the control signal. A row control circuit is connected to the delay measurement circuit to receive the measured time delay and, in turn, deliver, via the driver circuit, the control signal to all pixel groups in a single row substantially simultaneously.

A photoelectric conversion apparatus and the like that enables a predetermined determination in response to the incidence of photons is provided. The photoelectric conversion apparatus comprising a pixel provided with a photoelectric conversion unit that outputs a signal in response to the incidence of a photon; and a plurality of processing units configured to correspond to the pixel, wherein the processing unit has a first counter circuit configured to count an output signal from the pixel during a predetermined time period and a first memory configured to store a count value counted by the first counter circuit as a second count value, and wherein the processing unit outputs a determination result obtained by comparing a first count value output by the first counter circuit and a predetermined threshold that has been set based on the second count value read out from the first memory.

An image sensing device includes an image sensor suitable for correcting depth information based on a control signal, and for generating image data according to the depth information, and a controller suitable for analyzing an error of the depth information, and for generating the control signal, based on first and second cycle signals provided from the image sensor.

Disclosed is an image sensor including a plurality of selection circuits each suitable for receiving two clock signals among an input clock signal and a plurality of delayed clock signals, and outputting, as each of a plurality of selection clock signals, one selection clock signal between the two clock signals on the basis of a control signal; and a plurality of buffer circuits suitable for generating the plurality of delayed clock signals on the basis of the plurality of selection clock signals outputted from the plurality of selection circuits.

An imaging apparatus includes a control unit configured to perform a margin-based flickerless control. The margin-based flickerless control is a control where a timing control is performed, on the basis of a period of a detected flicker component and a peak timing of the flicker component, to synchronize a specific timing within an exposure duration with the peak timing and where the timing control is not performed as long as an offset amount of the specific timing falls within a margin set as an offset allowance from the peak timing.

A generator of phases of a detector integrates at least one elementary machine for interpreting a microcode stored in a register. Each elementary machine includes at least one control input having a logic level change detector. Each elementary machine also includes at least one phase output having a controlled switch, enabling to define the logic level of the phase output, and a controlled inverter enabling to toggle the logic level of the phase output. Further, each elementary machine includes at least one clock signal associated with a counter, and a unit for loading the instructions and the arguments stored in the register, the instructions being coded over 3 bits.

An analog-to-digital converter comprises: an analog-to-digital conversion unit that performs analog-to-digital conversion using ?? modulation on an image signal output from pixels; a setting unit that sets an operating frequency of the analog-to-digital conversion unit; and a generation unit that generates a clock signal having the operating frequency and supplies it to the analog-to-digital conversion unit. The setting unit sets the operating frequency based on at least one of a digital gain to be applied to the signal output from the analog-to-digital conversion unit and a shooting mode.

An image sensor, a mobile device, and an image sensor operation method for reducing a data transmission latency are disclosed. The image sensor includes an interface circuit configured to receive compressed data from an external processor, at least one memory configured to store the compressed data, and a control logic circuit configured to decompress the compressed data based on an initialized first clock rate, wherein, after the control logic circuit decompresses the compressed data, the first clock rate is reset to a second clock rate.

A photoelectric conversion apparatus includes a plurality of pixels including a photodiode configured to perform avalanche multiplication, and a signal processing circuit configured to generate a signal. The signal processing circuit includes a control circuit, a counter, and an illuminance determination circuit. The control circuit is connected to the photodiode and a generation circuit configured to generate a pulse signal, and controls a state between a first state, and a second state, in accordance with the pulse signal. The counter counts the number of periods in which avalanche multiplication occurs, among a plurality of periods in the first state. The illuminance determination circuit determines whether a count value of the counter has reached a threshold value. The signal processing circuit includes a circuit configured to set a frequency of the pulse signal in accordance with a result of determination performed by the illuminance determination circuit.