An image sensor device includes a first pixel that is located at a first row and a first column and comprising a first select transistor and is configured to output a first pixel signal through a first column line, and a second pixel that is located at a second row different from the first row and the first column and comprising a second select transistor and is configured to output a second pixel signal through a second column line. During a first time period, the first select transistor is turned on and the first pixel signal is output, and during a second time period, the second select transistor is turned on, and a first voltage is applied to the second column line through the second select transistor, the second time period including the first time period.

Disclosed are methods and systems for 3D scanning.

An image sensor system including: a timing control circuit, an image sensor and a modulation circuit. The timing control circuit is arranged to determine if a coding condition is fit according to an input signal and generate a control signal when the coding condition is fit, wherein the input signal is generated in response to each pulse of a clock signal. The image sensor is coupled to the timing control circuit, and the image sensor includes a plurality of pixels, wherein one of the plurality of pixels receives the control signal from the timing control circuit and outputs a sensing signal. The modulation circuit is coupled to the image sensor and arranged to receive the sensing signal and generate an output signal according to the sensing signal, wherein a frequency of the output signal is different from a frequency of the sensing signal.

An imaging device includes: an image sensor including a plurality of pixels; a transmission cable configured to transmit power to the image sensor; a power source provided on a proximal end side of the transmission cable and configured to supply a voltage to the image sensor; a pulse signal superimposing unit provided on the proximal end side of the transmission cable and configured to superimpose a pulse signal on the voltage; a separator connected between the image sensor and the transmission cable and configured to separate an offset voltage and a pulse voltage from the voltage; a pulse signal detector connected between the separator and the transmission cable on a distal end side of the transmission cable and configured to detect the pulse signal superimposed on the offset voltage; and a timing generator configured to generate a driving signal based on the detected pulse signal.

An image sensing system includes a pixel array, an analog-to-digital converter circuit, and a memory. The pixel array includes a first pixel, a second pixel, and a third pixel interposed between the first pixel and the second pixel. During a first sensing time, the analog-to-digital converter circuit converts a first image signal received from the first pixel to first image data and converts a second image signal received from the second pixel to second image data. During a second sensing time, the analog-to-digital converter circuit converts a third image signal received from the third pixel to third image data. The first image data and the second image data are written in the memory during a first write time, and the third image data are written in the memory during a second write time.

An image capturing device includes: a first substrate; a second substrate arranged so that the second substrate overlaps the first substrate; a pixel unit having a plurality of pixels arranged in a matrix shape on the first substrate; a first vertical scanning circuit arranged on one of the first substrate and the second substrate and configured to output a control signal supplied to every row or every two or more rows of the plurality of pixels; and a plurality of first buffers arranged on the second substrate so that the plurality of first buffers overlap the pixel unit, provided in correspondence with one row or a plurality of rows of the plurality of pixels, and connected to respective signal lines through which the control signal output from the first vertical scanning circuit is transmitted.

A data transfer circuit that can suppress a voltage drop in a start signal without narrowing a process margin. The data transfer circuit includes N stages of register sections that are connected in series. A register section at an n.sup.th stage includes: a first transfer gate that transfers an analog signal; a second transfer gate that transfers one clock out of a clock signal, thereby generating an (n+1).sup.th start signal for a register section at an (n+1).sup.th stage; a control signal generation circuit that generates control signals for the first transfer gate and the second transfer gate; and a holding capacitor. The control signal generation circuit includes a third transfer gate that transfers an n.sup.th start signal that is input from a register section at an (n?1).sup.th stage, and the third transfer gate is formed as a CMOS logic circuit.

The invention features an image reader and a corresponding method for capturing a sharp distortion free image of a target, such as a one or two-dimensional bar code. In one embodiment, the image reader comprises a two-dimensional CMOS based image sensor array, a timing module, an illumination module, and a control module. The time during which the target is illuminated is referred to as the illumination period. The capture of the image by the image sensor array is driven by the timing module that, in one embodiment, is able to simultaneously expose substantially all of the pixels in the array. The time during which the pixels are collectively activated to photo-convert incident light into charge defines the exposure period for the sensor array. In one embodiment, at least a portion of the exposure period occurs during the illumination period.

An image sensor includes a first transfer gate formed over a substrate, and including a first projection; a second transfer gate formed over the substrate, neighboring the first transfer gate, and including a second projection; and a floating diffusion formed in the substrate, and partially overlapping with the first transfer gate and the second transfer gate, wherein the first projection and the second projection face each other.

Apparatuses for optical and image sensing are disclosed herein. The optical sensing apparatus can include a first and a second signal wire. The optical sensing apparatus can include N photodetectors arranged in an array, connected to the first signal wire and a second input terminal connected to the second signal wire. The optical sensing apparatus can include a modulation circuit configured to generate a modulated signal including a source transistor pair, a sink transistor pair, and a second sink transistor wherein a first photodetector of the N photodetectors is arranged between the source transistor pair and an Nth photodetector of the N photodetectors, and the Nth photodetector of the N photodetectors is arranged between the sink transistor pair and the first photodetector of the N photodetectors.