A photoelectric conversion apparatus includes a pixel which includes a photoelectric conversion element; a signal line connected with the pixel; a voltage-current conversion unit configured to convert a voltage signal of the signal line into current; and a conversion unit that includes an oversampling type analog-to-digital conversion circuit that converts the current outputted from the voltage-current conversion unit into digital signals. The voltage-current conversion unit converts the voltage signal of the signal line into the current without sampling and holding and outputs the converted current to the conversion unit.

Disclosed is an image sensor including first to fourth, fifth to eighth, ninth to 12.sup.th and 13.sup.th to 16.sup.th unit pixel circuits, a first readout line connected to the first and ninth unit pixel circuits, a second readout line connected to the fifth and 13.sup.th unit pixel circuits, a third readout line connected to the second and 10.sup.th unit pixel circuits, a fourth readout line connected to the sixth and 14.sup.th unit pixel circuits, a fifth readout line connected to the third and 11.sup.th unit pixel circuits, a sixth readout line connected to the seventh and 15.sup.th unit pixel circuits, a seventh readout line connected to the fourth and 12.sup.th unit pixel circuits, an eighth readout line connected to the eighth and 16.sup.th unit pixel circuits, first to fourth readout circuits, and a path selector connecting the unit pixel circuits to the readout circuits via the readout lines.

Disclosed is an image sensor including first to fourth, fifth to eighth, ninth to 12.sup.th and 13.sup.th to 16.sup.th unit pixel circuits, a first readout line connected to the first and ninth unit pixel circuits, a second readout line connected to the fifth and 13.sup.th unit pixel circuits, a third readout line connected to the second and 10.sup.th unit pixel circuits, a fourth readout line connected to the sixth and 14.sup.th unit pixel circuits, a fifth readout line connected to the third and 11.sup.th unit pixel circuits, a sixth readout line connected to the seventh and 15.sup.th unit pixel circuits, a seventh readout line connected to the fourth and 12.sup.th unit pixel circuits, an eighth readout line connected to the eighth and 16.sup.th unit pixel circuits, first to fourth readout circuits, and a path selector connecting the unit pixel circuits to the readout circuits via the readout lines.

A method of reading a pixel value from an image sensor housed with a set of components includes determining a current state of the set of components; adjusting, at least partly responsive to the current state of the set of components, a correlated double sampling (CDS) time; and performing, in accordance with the adjusted CDS time, a CDS readout of at least one pixel in a pixel array of the image sensor.

A selection pixel where signal readout is performed and a reference pixel where signal readout is not performed are arranged in a pixel array section, and an amplification transistor of the selection pixel and an amplification transistor of the reference pixel each source electrode of which is connected in common to a common wire are connected with a constant current source via the common wire to form a differential amplification circuit. Then, a bypass control section which selectively establishes connection between the constant current source and a differential output node of the differential amplification circuit and limits a voltage of the differential output node to a predetermined voltage by causing a bypass current to flow between the constant current source and the differential output node, and a current path for bypass current that supplies the bypass current to the constant current source through the pixel array section are included.

A semiconductor device with a small circuit scale is provided. The semiconductor device includes a first circuit and a second circuit. The first circuit includes first to n-th (n is an integer of 2 or more) transistors and the second circuit includes (n+1)-th to 2n-th transistors. The first to n-th transistors are connected in parallel to each other and the (n+1)-th to 2n-th transistors are connected in series to each other. First to n-th signals are supplied to the first circuit and the second circuit. The first circuit has a function of outputting a first potential when each of potentials of the first to n-th signals is lower than or equal to a first reference potential, and outputting a second potential when at least one of the potentials of the first to n-th signals is higher than the first reference potential. The second circuit has a function of outputting a third potential when each of the potentials of the first to n-th signals is higher than a second reference potential, and outputting the first potential when at least one of the potentials of the first to n-th signals is lower than or equal to the second reference potential.

Noise is reduced in a solid-state image capturing element provided with an ADC for each column. An analog-to-digital converter increases or decreases an analog signal using an analog gain selected from among a plurality of analog gains, and converts the increased or decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, one of a test signal having a predetermined level and a pixel signal to the analog-to-digital converter. In a case where a test signal is inputted, a correction value calculation section obtains, from the analog signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section, when inputted with the pixel signal after the correction value is outputted, corrects the digital signal using the correction value.

Color filters are used for color images obtained using imaging devices such as conventional image sensors. Imaging elements with color filters are sold, and an appropriate combination of the imaging element and a lens or the like is incorporated in an electronic device. Only providing a color filter to overlap a light-receiving region of an image sensor reduces the amount of light reaching the light-receiving region.

An imaging system of the present invention includes a solid-state imaging element without a color filter, a storage device, and a learning device. As a selection standard for reducing the amount of learning data, in an HSV color space, saturation is used, and selection is performed so that the saturation has optimal distribution. When colorization disclosed in this specification is performed, the colorization and object highlight processing can be performed at the same time.

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions.

A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420. Of a pixel signal PIXOUT input into an input node ND401, the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND402. Of the pixel signal PIXOUT input into the input node ND401, the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND402.

Provided is a photoelectric conversion device including a pixel array that includes pixels forming columns and is arranged in a substrate, first signal lines each transmitting a signal output from a pixel of a corresponding column, an analog circuit arranged in the substrate and configured to process signals from the pixels, second signal lines transmitting signals from the pixels to the analog circuit on a column basis, a switch configured to change a combination of connections between the first signal lines and the second signal lines, and a shift register arranged in the substrate, including a flip-flop, and configured to control the switch. In a plan view with respect to the substrate, the shift register is arranged between the pixel array and the analog circuit. In the plan view, the switch and the flip-flop are arranged in a direction different from a direction in which the first signal lines extend.