An electronic device according to various embodiments may include a housing, an antenna structure positioned in the housing, and a wireless communication circuit. The antenna structure may include a first conductive layer including a first opening, a second conductive layer positioned in parallel with the first conductive layer, and including a second opening which overlaps at least in part with the first opening when the first conductive layer is seen from above, a third conductive layer positioned in parallel with the first conductive layer and interposed between the first conductive layer and the second conductive layer, a first insulating layer interposed between the first conductive layer and the third conductive layer, a second insulating layer interposed between the second conductive layer and the third conductive layer, a first conductive plate electrically separated from the first conductive layer and disposed within the first opening, a second conductive plate electrically separated from the second conductive layer and disposed within the second opening, a first conductive via electrically coupled between the first conductive plate and the third conductive layer through the first insulating layer, and a second conductive via electrically coupled between the second conductive plate and the third conductive layer through the second insulating layer. The wireless communication circuit may be configured to transmit or receive a signal having a frequency between 3 Giga Hertz (GHz) and 100 GHz and is electrically coupled to the antenna structure. Various embodiments may be possible.

An network addressable lighting device that receives the input power from a power source (PSE), such as a network Power Over Ethernet (PoE) source, at a physical interface and data assembly PIDA and passes the signal directly to a second power assembly (PA) while the AC coupled high-speed data lines stay exclusively on the PIDA that contains the input and output physical interfaces, such as RJ interfaces. All power rails required to run the PIDA are converted on the PA and can then be sent back to the PIDA via low-cost conventional board stacker connectors. Movement of the high-current is done on the power assembly and not the data assembly where the sensitive communications primarily occur. The implementations thus provide an ideal separation of power and data structures to reduce EMI/EMC issues in a low cost and compact device.

An electronic apparatus and heat dissipation and EMI shielding structure thereof are provided. The electronic apparatus includes a substrate, at least one chip disposed on the substrate, and the heat dissipation and EMI shielding structure. The heat dissipation and EMI shielding structure covers the chip and includes a shielding frame and a heat dissipation element. The shielding frame has an opening to expose the chip, and the heat dissipation element is disposed on the shielding frame and covers the opening. The conjunction of the shielding frame and the heat dissipation element can protect the chip from being interfered with electromagnetic waves, and the heat generated by the chip can be dissipated by the heat dissipation element.

A voltage divider circuit assembly includes resistors, an external electrostatic shield, and internal electrostatic shield(s). The resistors are in series with each other between input terminals that receive an input voltage. An external resistor is disposed between sensing terminals that conduct an output voltage that is the input voltage divided by the resistors in the series. The external shield is conductively coupled with the series of the resistors with the external resistor disposed outside of the external shield and the other resistor(s) inside the external shield. The internal shield(s) are conductively coupled with the resistors and disposed inside the external shield. A first internal resistor is disposed inside the external shield and outside of the internal shield(s). One or more remaining resistors are inside the internal shield(s). The shields divide parasitic capacitances to enable the measurement of dynamically changing high voltage input signals.

A method is provided for forming an internal electromagnetic interference (EMI) shield in a mold cap formed over a printed circuit board (PCB). The method includes forming a trench in the mold cap, the trench extending continuously from a first edge of the mold cap to a second edge of the mold cap, where the trench defines a trench pattern corresponding to desired locations of the internal EMI shield. The method further includes sealing an elastomeric pad on a top surface of the mold cap to form a channel, the channel including at least the trench formed in the mold cap; and filling the channel with a conductive epoxy using a vacuum configured to draw the conductive epoxy from a dispenser, connected to the first edge of the mold cap, through the channel to the second edge of the mold cap based on pressure differential.

A multilayer resin substrate includes resin substrates laminated together, an overlapping portion in which a signal line as a conductor pattern and another conductor pattern overlap each other in a laminating direction of the resin substrates, and a non-overlapping portion in which the signal line and the other conductor pattern do no overlap each other in the laminating direction. A thin portion is provided at a position in the non-overlapping portion near the overlapping portion. The thin portion is a portion of the multilayer resin substrate which has a thickness smaller than the thickness in the overlapping portion in the laminating direction of the resin substrates.

An interconnect structure includes a first conductor, a second conductor, a dielectric block, a substrate, and a pair of conductive lines. The first conductor and the second conductor form a differential pair design. The dielectric block surrounds the first conductor and the second conductor. The first conductor is separated from the second conductor by the dielectric block. The substrate surrounds the dielectric block and is spaced apart from the first conductor and the second conductor. The pair of conductive lines is connected to the first conductor and the second conductor, respectively, and extends along a top surface of the dielectric block and a top surface of the substrate.

A high-frequency module includes a module substrate having a main surface, circuit components arranged on the main surface, a resin member covering at least a part of the main surface and the circuit components, a metallic shield layer covering at least an upper surface of the resin member, and a metallic shield plate arranged on the main surface and between the circuit component and the circuit component when the main surface is viewed in a plan view. The metallic shield plate is in contact with the metallic shield layer. An engraved mark portion indicating predetermined information is provided on the upper surface of the resin member. At least a part of the engraved mark portion is provided in a portion in which the resin member and the metallic shield plate overlap each other when the main surface is viewed in a plan view

Systems, methods, and apparatus for reducing crossover coupling of two or more RF signals are described. In one case, a crossover structure is described where RF signals are routed through coplanar waveguides having a specific characteristic impedance and crossing at a central point of the crossover structure by way of a bridge. A ground shield having a geometry adapted to reduce the crossover coupling while minimally affecting capacitive coupling between the RF signals and the ground shield is introduced in-between a region comprising the central point. Further described is a multi-port rotary RF switch fitted with the crossover structure which allows substantially balanced electrical performance across all the operational states of the rotary RF switch at RF signal frequencies up to 40 GHz and beyond.

A method for manufacturing a wiring board includes preparing a core substrate having first and second surfaces, forming a first build-up structure including interlayer insulating layers and conductor layers on the first surface of the substrate, and forming a second build-up structure including interlayer insulating layers and one or more conductor layers on the second surface of the substrate. The forming of the first structure includes laminating the insulating layers and metal layers on first surface side of the substrate and forming the conductor layers from all of the metal layers on the first surface side, and the forming of the second structure includes laminating the insulating layers and metal layers on second surface side of the substrate, forming the one or more conductor layers from one or more of the metal layers on the second surface side, and entirely removing the other metal layers on the second surface side.