An electronic apparatus includes: an electronic module; and a flexible substrate electrically connected to the electronic module. The flexible substrate includes: a base film; a plurality of first contact pads arranged at one end on the base film in a first direction, and electrically connected to the electronic module; a plurality of second contact pads arranged at an other end on the base film in the first direction; a plurality of first wires arranged on the base film, and each electrically connecting one of the first contact pads and one of the second contact pads together, and a plurality of third contact pads arranged on the base film, each of the third contact pads being positioned along the first direction between one of the first contact pads and one of the second contact pads, and being electrically connected to one of the first wires.

A scalable, detachable interconnect system is provided that includes a shielded-frame structure having alignment features that forms a separable interconnect assembly which can be used to electrically couple at least two semiconductor devices. The interconnect system functions to protect, secure, and align electrical contacts on a first and a second semiconductor device coupled together. In this manner, the interconnect assembly realizes an electrical-mechanical interposer system that can securely connect semiconductor devices (e.g., printed circuit boards and semiconductor device packages) together while presenting electrical optimization features such as internal ground shielding and mechanical properties such as resilience, compliance, reusability, and reliable scrub motion to remove oxide from the pads or bumps.

A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.

The disclosure provides a circuit board that includes: a carrier element having a number of circuit board layers; a number of electronic components; a number of thermal interfaces; and a number of electrical interfaces. The electronic components are arranged directly on at least one of the surface sides on the carrier element. The opposite surface side of the carrier element is of potential-free design. Additionally, the circuit board with the electronic components is overlaid by a covering material in such a way that the electronic components are mechanically stabilized and the thermal and/or electrical interfaces are free of the covering material.

The present invention is directed to a system for testing printed circuit boards. The system is configured to test the simultaneously test a multiplicity of printed circuit boards. The system examines the electrical characteristics of a printed circuit board and is operable to identify if a printed circuit board meets a desired characteristic.

Method for providing an electrical connection, comprising connecting a first cable to a first conducting structure on a printed circuit board, connecting a second cable to a second conducting structure on the printed circuit board, comparing a propagation delay of a first signal path comprising the first cable and the first conducting structure on the printed circuit board, and a propagation delay of a second signal path comprising the second cable and the second conducting structure on the printed circuit board; and removing conductive material of the first conducting structure and/or of the second conducting structure, in order to modify an electrical length of the first conducting structure and/or of the second conducting structure, to obtain a first conducting path and a second conducting path, in dependence on a result of the comparison, in order to reduce a difference of the propagation delays between the first signal path and the second signal path.

The present disclosure relates to the field of circuit testing technologies and discloses a flexible circuit board and a test fixture. The flexible circuit board comprises: a flexible body which has a first crimping portion and an extension portion, the first crimping portion being used to be laminated with a second crimping portion of a substrate to be tested; a first electrically connected structure which is located on a first side of the flexible body, arranged on the first crimping portion, and used to be laminated with a second electrically connected structure on the second crimping portion; a support structure which is located on the first side of the flexible body and includes a first support portion and a second support portion; the first support portion is arranged on the extension portion and configured to support the extension portion in the laminating state.

A module substrate for a semiconductor module including a wiring substrate having an upper surface and a lower surface opposite to each other and including a wiring formed therein, the wiring substrate having at least one through groove in at least one sidewall and extending in a thickness direction, and a through-groove test terminal including at least one contact pad, a surface of the contact pad being exposed from an inner wall of the through-groove, the contact pad being spaced apart from a vertical plane extending from the sidewall of the wiring substrate may be provided.

A display device including: a display panel; a first substrate attached to a side of the display panel; and a second substrate attached to a side of the first substrate, wherein the display panel includes a first panel test pad and a second panel test pad, the first substrate includes a 1-1 circuit test lead overlapping and connected to the first panel test pad, a 1-2 circuit test lead overlapping and connected to the second panel test pad, a 2-1 circuit test lead overlapping and connected to the second substrate, a 1-1 test lead line connected to the 1-1 circuit test lead, a 1-2 test lead line connected to the 1-2 circuit test lead, and a first test lead line connected to the 2-1 circuit test lead, and the 1-1 test lead line and the 1-2 test lead line are connected to the first test lead line.

A chip-on-film package includes a base substrate on which a first pad region, a second pad region, and a third region located between the first pad region and the second pad region are defined, a dummy pad disposed on the first pad region, input pads disposed on the first pad region, output pads disposed on the second region, a first detection line disposed on the base substrate, and a second detection line disposed on the base substrate. The first detection line is connected to a first input pad and a second input pad via the second pad region to form a first loop between the first input pad and the second input pad, and the second detection line is connected to the dummy pad and the first detection line via the third region to form a second loop between the dummy pad and the first input pad.