A method and apparatus for detecting an electrical fault in a printed circuit board includes a first conductive layer interconnecting a set of electrical components, a second conductive layer connected to an electrical ground, a set of fuses arranged about the printed circuit board, and a fault detection circuit electrically connected to the printed circuit board.

An electronic device according to various embodiments may include: a board; a communication circuit disposed on one face of the board and configured to process a communication signal in a designated frequency band; an antenna disposed on the one face of the board or inside the board; a connector disposed on another face of the board, and including a first contact electrically connected to a first signal path through which the communication circuit is configured to transmit a signal to the antenna in a first direction, and a second contact electrically connected to a second signal path through which the communication circuit configured to transmit a signal to the antenna in a second direction; and conductive pads disposed on the another face of the board spaced apart from the connector, and including at least two first pads corresponding to the first contact and at least two second pads corresponding to the second contact.

A wiring assembly board for assembling a wire harness. The wire harness comprises a plurality of wires connected between a plurality of wiring connectors, each connector comprising an array of wire terminals. The wiring assembly board comprises an assembly surface and a plurality of test connectors provided on the assembly surface. Each test connector is for connection to a respective wiring connector and comprises an array of test terminals for establishing an electrical connection with the respective array of wire terminals once the wiring and test connectors have been connected. A microcomputer is associated with each test connector and comprises an interface for individually transmitting or receiving test signals though each test terminal of the respective test connector.

A multilayer board includes a first insulator layer including a first coil pattern thereon, a second insulator layer including a second coil pattern thereon, a third insulator layer including a third coil pattern thereon, a first terminal on the first insulator layer and connected to one end of the first coil pattern, a first floating pattern on the first insulator layer and not connected to the first coil pattern, and a second terminal on the third insulator layer and connected to one end of the third coil pattern. The first, second, and third insulator layers are sequentially laminated. The first, second, and third coil patterns are respectively electrically connected in sequence. The first floating pattern overlaps the second coil pattern when viewed from a laminating direction.

A wiring substrate includes an insulating body; a first conductor including a first shield layer provided in a first layer inside the insulating body, and a second shield layer provided in a second layer at a different position from the first layer in a thickness direction of the insulating body; a second conductor including a first guard layer provided in a third layer positioned between the first layer and the second layer in the thickness direction, and a second guard layer provided in a fourth layer positioned between the second layer and the third layer in the thickness direction; and a third conductor provided in a fifth layer positioned between the third layer and the fourth layer in the thickness direction.

A display panel includes pixels and a driver IC pad area; a driver IC on the driver IC pad area of the display panel; first input pads and first output pads that overlap the driver IC pad area; a flexible printed circuit adjacent to the driver IC pad area on the display panel; first output test pads that overlap the flexible printed circuit, and are respectively extended to the first output pads; and first input extending wires that overlap the flexible printed circuit, are respectively extended to the first input pads, and are between the first output test pads.

The present invention discloses a driving circuit for a display panel and a display device. The driving circuit includes a driving circuit board configured to carry a driving circuit, and first pads located on the driving circuit. The first pads are connected through a detachable connector.

There is provided a control circuit board including a board, an integrated circuit, and a pad group. The board includes a first surface and a second surface, where the first surface and the second surface are on opposite sides of the board. The integrated circuit is disposed on the first surface of the board. The pad group is disposed on the second surface of the board and is electrically connected to the integrated circuit through a through-hole formed in the board.

A method for acquiring a signal from an encapsulated test point on a device under test, includes forming a hole in an encapsulant adjacent to the test point, the hole extending through the encapsulant to the test point, delivering a UV-curable conductive adhesive into the hole such that the delivered adhesive contacts the test point, applying UV light from a UV light source to cure the delivered adhesive, and connecting a conductive element between the cured adhesive and a test and measurement instrument.

A circuit board and a method for electrical performance detection thereof, a display panel, a method for fabricating a display panel, and a method for driving the display panel are provided. In the electrical performance detection, the signal output terminal is electrically connected to the detection terminal, and detection is performed on the drive signal by the electrical performance detection circuit to determine whether the circuit board is abnormal, achieving the electrical performance detection of the circuit board. In addition, in a process other than the electrical performance detection, the signal output terminal is disconnected from the detection terminal to avoid affecting a normal operation of the circuit board. The electrical performance detection of the circuit board is realized, a defective circuit board is prevented from flowing into a subsequent fabricating procedure, and waste of assembling resources is avoided.