A circuit board has: an insulating substrate formed by plural ceramic insulating layers being layered on one another and having a first surface and a second surface on the opposite side to the first surface; a circuit conductor passing through the inside of the insulating substrate and positioned in a region from the first surface to the second surface; and at least one heating wire positioned in the insulating substrate. The heating wire is positioned in, among plural interlayer regions between the ceramic insulating layers, at least one interlayer region between the ceramic insulating layers and has a mesh shape having plural first through holes through which a portion of the circuit conductor passes and having plural second through holes through which the circuit conductor does not pass.

An insulating metal substrate structure is provided. The insulating metal substrate structure includes an electrically-insulating layer, a plurality of metal layers, a plurality of electrically-insulating heat-conductive layers, and a heat-dissipation layer. The plurality of electrically-insulating heat-conductive layers are formed on the heat-dissipation layer. The electrically-insulating layer surrounds the plurality of metal layers, such that the plurality of metal layers are separated into different regions in a different region to form a predetermined circuit pattern. The electrically-insulating layer has at least one recessed corner structure that is configured to position the electrically-insulating heat-conductive layers filled between one of the metal layers and the heat-dissipation layer.

A copper/ceramic bonded body is provided, including: a copper member made of copper or a copper alloy; and a ceramic member, the copper member and the ceramic member being bonded to each other, in which a total concentration of Al, Si, Zn, and Mn is 3 atom % or less when concentration measurement is performed by an energy dispersive X-ray analysis method at a position 1000 nm away from a bonded interface between the copper member and the ceramic member to a copper member side, assuming that a total value of Cu, Mg, Ti, Zr, Nb, Hf, Al, Si, Zn, and Mn is 100 atom %.

A composite substrate includes, in this order: a ceramic plate; a metal layer containing at least one selected from the group consisting of aluminum and an aluminum alloy; and a thermal sprayed layer containing at least one selected from the group consisting of copper and a copper alloy, and an intermetallic compound containing copper and aluminum as constituent elements is scattered between the metal layer and the thermal sprayed layer.

A printed board includes a first and second insulator extending in a first direction; a third insulator extending in a second direction and including a first and second portion located above and below the first insulator respectively in a third direction; a fourth insulator extending in the second direction, and including a third and fourth portion located below and above the first insulator respectively in the third direction; and a first and second conductor extending in the first direction, and arranged along the second direction with a first pitch therebetween. The first pitch is an n multiple of a first distance that is based on an interval between the first and second portion or the third and fourth portion. The n is an integer equal to or greater than 1.

A semiconductor device includes: an insulated circuit substrate including first and second conductive layers on a top surface side; a first semiconductor chip mounted on the first conductive layer; a second semiconductor chip mounted on the second conductive layer; a printed circuit board including a first lower-side wiring layer arranged to be opposed to the first semiconductor chip, and a second lower-side wiring layer arranged to be opposed to the second semiconductor chip, the printed circuit board being provided with a curved part curved toward the insulated circuit substrate; a first connection member arranged to connect the first semiconductor chip with the first lower-side wiring layer; a second connection member arranged to connect the second semiconductor chip with the second lower-side wiring layer; and a third connection member arranged to connect the first conductive layer with the second lower-side wiring layer at the curved part.

Embodiments disclosed herein include package substrates and methods of forming such package substrates. In an embodiment a package substrate comprises a glass core, and a vertically oriented inductor embedded in the glass core. In an embodiment, the inductor comprises vertical vias through the glass core, and where the vertical vias are electrically coupled together by conductive traces over a surface of the glass core to provide a plurality of conductive turns.

A package carrier includes a substrate, at least one interposer disposed in at least one opening of the substrate, a conductive structure layer, a first build-up structure, and a second build-up structure. The interposer includes a glass substrate, at least one conductive via, at least one first pad, and at least one second pad. The conductive via passes through the glass substrate, and the first and the second pads are disposed respectively on an upper surface and a lower surface of the glass substrate opposite to each other and are connected to opposite ends of the conductive via. The conductive structure layer is disposed on the substrate and is structurally and electrically connected to the first and the second pads. The first and the second build-up structures are disposed respectively on the first and the second surfaces of the substrate and are electrically connected to the conductive structure layer.

Embodiments disclosed herein include package substrates for electronic packaging applications. In an embodiment, a package substrate comprises a first glass layer, where the first glass layer comprises a first via through the first glass layer, and the first via has an hourglass shaped cross-section. The package substrate may further comprise a second glass layer over the first glass layer, where the second glass layer comprises a second via through the second glass layer, and where the second via has the hourglass shaped cross-section. In an embodiment, the first via is electrically coupled to the second via.

An electronic element mounting substrate includes: a first substrate including a first principal face; a second substrate located inside the first substrate in a plan view of the electronic element mounting substrate, the second substrate being made of a carbon material; a third substrate located between the first substrate and the second substrate in the plan view, the third substrate being made of a carbon material; and a first mounting portion for mounting a first electronic element, the first mounting portion being located on the first principal face side in a thickness direction of the substrate. The second substrate and the third substrate each have a low heat conduction direction and a high heat conduction direction. The second substrate and the third substrate is arranged so that the low heat conduction directions thereof are perpendicular to each other, and the high heat conduction directions thereof are perpendicular to each other.