A circuit board includes an interconnect and an insulating layer that covers the interconnect. The interconnect includes a first interconnect that is formed to serve as a recognition mark of which planar shape is a predetermined shape. The insulating layer has a through-hole of which planar shape is variant and that penetrates the insulating layer in a thickness direction of the insulating layer such that an entire upper surface of the first interconnect is exposed. The through-hole includes a first through-hole of which planar shape is a predetermined shape and that penetrates the insulating layer in the thickness direction such that the entire upper surface of the first interconnect is exposed and a second through-hole that serves as part of an inner wall surface of the first through-hole and that penetrates the insulating layer in the thickness direction.

A circuit board includes an interconnect and an insulating layer that covers the interconnect. The interconnect includes a first interconnect that is formed to serve as a recognition mark of which planar shape is a predetermined shape. The insulating layer has a through-hole of which planar shape is variant and that penetrates the insulating layer in a thickness direction of the insulating layer such that an entire upper surface of the first interconnect is exposed. The through-hole includes a first through-hole of which planar shape is a predetermined shape and that penetrates the insulating layer in the thickness direction such that the entire upper surface of the first interconnect is exposed and a second through-hole that serves as part of an inner wall surface of the first through-hole and that penetrates the insulating layer in the thickness direction.

Provided is a plating lamination technology for providing a highly adhesive inner layer of a printed circuit board. The plating lamination technology is effective in providing an electroless plated laminate, including a non-etched/low-roughness pretreated laminate or a low-roughness copper foil, and a printed circuit board including the plated laminate.

Provided is a plating lamination technology for providing a highly adhesive inner layer of a printed circuit board. The plating lamination technology is effective in providing an electroless plated laminate, including a non-etched/low-roughness pretreated laminate or a low-roughness copper foil, and a printed circuit board including the plated laminate.

A manufacturing method includes stacking, between two endless belts, a first sheet of metal foil, a plurality of insulating films, and a second sheet of metal foil in this order one on top of another and hot-press molding these sheets and films together to form an insulating layer out of the plurality of insulating films. Each of the plurality of insulating films has a first surface and a second surface. The second surface has a larger ten-point mean roughness (Rzjis) than the first surface. The absolute value of difference between a ten-point mean roughness (Rzjis) of a surface, in contact with the first sheet of metal foil, of the insulating layer and a ten-point mean roughness (Rzjis) of another surface, in contact with the second sheet of metal foil, of the insulating layer is equal to or less than 0.35 μm.

A manufacturing method includes stacking, between two endless belts, a first sheet of metal foil, a plurality of insulating films, and a second sheet of metal foil in this order one on top of another and hot-press molding these sheets and films together to form an insulating layer out of the plurality of insulating films. Each of the plurality of insulating films has a first surface and a second surface. The second surface has a larger ten-point mean roughness (Rzjis) than the first surface. The absolute value of difference between a ten-point mean roughness (Rzjis) of a surface, in contact with the first sheet of metal foil, of the insulating layer and a ten-point mean roughness (Rzjis) of another surface, in contact with the second sheet of metal foil, of the insulating layer is equal to or less than 0.35 μm.

A wiring circuit board includes two insulating layers, a wiring layer, a pad portion, and a conductive connection portion. The wiring layer is on one side in a thickness direction of the first insulating layer, and has a contact portion. The second insulating layer is on one side in the thickness direction of the first insulating layer to cover the wiring layer. The pad portion is on one side in the thickness direction of the second insulating layer. The second insulating layer has a through opening portion and having an opening along at least a part of a peripheral end portion of the pad portion. The contact portion of the wiring layer faces the through opening portion. The conductive connection portion, is connected to at least the peripheral end portion of the pad portion, and the contact portion, and electrically connects the wiring layer to the pad portion.

A wiring circuit board includes two insulating layers, a wiring layer, a pad portion, and a conductive connection portion. The wiring layer is on one side in a thickness direction of the first insulating layer, and has a contact portion. The second insulating layer is on one side in the thickness direction of the first insulating layer to cover the wiring layer. The pad portion is on one side in the thickness direction of the second insulating layer. The second insulating layer has a through opening portion and having an opening along at least a part of a peripheral end portion of the pad portion. The contact portion of the wiring layer faces the through opening portion. The conductive connection portion, is connected to at least the peripheral end portion of the pad portion, and the contact portion, and electrically connects the wiring layer to the pad portion.

A multilayer substrate module includes a first substrate portion including a first substrate portion body including first insulator layers stacked in a vertical direction and a first conductor layer and/or a first interlayer connection conductor provided at the first substrate portion body. A second substrate portion includes a second substrate portion body including second insulator layers stacked in the vertical direction and a second conductor layer and a second interlayer connection conductor provided at the second substrate portion body, and is mounted on an upper surface of the first substrate portion. A mount device is mounted on an upper surface or a lower surface of the second substrate portion. At least a portion of an inductance component is defined by the first conductor layer and the first interlayer connection conductor.

A multilayer substrate module includes a first substrate portion including a first substrate portion body including first insulator layers stacked in a vertical direction and a first conductor layer and/or a first interlayer connection conductor provided at the first substrate portion body. A second substrate portion includes a second substrate portion body including second insulator layers stacked in the vertical direction and a second conductor layer and a second interlayer connection conductor provided at the second substrate portion body, and is mounted on an upper surface of the first substrate portion. A mount device is mounted on an upper surface or a lower surface of the second substrate portion. At least a portion of an inductance component is defined by the first conductor layer and the first interlayer connection conductor.