A board-level pad pattern includes a printed circuit board (PCB) substrate; an exposed pad region disposed within a surface mount region of the base substrate; and multiple staggered ball pads disposed within the surface mount region arranged in a ring shape around the exposed pad region. The staggered ball pads includes first ball pads arranged in a first row and second ball pads arranged in a second row. The first ball pads in the first row are arranged at two different pitches, and the second ball pads in the second row are arranged at a constant pitch. Multiple square-shaped ball pads are arranged in a third row between the exposed pad region and the staggered ball pads.

A package has a package body formed by stacked insulating layers and having a front surface including a mounting area, a back surface and a side surface; a plurality of hollow portions arranged so as to be adjacent to each other on the front surface of the package body; a plurality of electrode pads individually placed on respective bottom surfaces of the hollow portions; and a partition wall formed by at least one insulating layer that forms the package body and having protruding banks at its both edge sides. Surfaces of the electrode pads are located at a lower position with respect to the front surface of the package body. The hollow portions are arranged at opposite sides of the partition wall. The electrode pads are electrically connected to respective conductor layers that are formed on the back surface and/or the side surface of the package body.

A multilayer capacitor includes: a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked on each other having at least one dielectric layer interposed therebetween in a first direction; first and second external electrodes disposed on the body while being spaced apart from each other to be respectively connected to first internal electrode and second internal electrode; and first and second bumps respectively having one surfaces disposed on the first or second external electrode and including at least one hole positioned in the one surface or the other surface, wherein A.sub.V indicates a total area of the at least one hole, A.sub.B indicates an area of the one surface of the first or second bump, facing the first or second external electrode, and A.sub.V/A.sub.B is greater than 0.012 and less than 0.189.

A wiring board includes a resin insulating layer having a component mounting surface, first connection pads formed on the component mounting surface of the resin insulating layer, second connection pads formed on the component mounting surface of the resin insulating layer such that the second connection pads are surrounding the first connection pads, and a protruding part including a metal material and formed on the component mounting surface of the resin insulating layer such that a portion of the protruding part is embedded in the resin insulating layer and that the protruding part is positioned between the first connection pads and the second connection pads and surrounding the first connection pads.

A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.

Provided is an electronic component including a pad region including a plurality of pads extending along corresponding extension lines and arranged in a first direction, and a signal wire configured to receive a driving signal from the pad region, wherein the plurality of pads include a plurality of first pads arranged continuously and a plurality of second pads arranged continuously, and extension lines of the plurality of first pads substantially converge into a first point and extension lines of the plurality of second pads substantially converge into a second point different from the first point.

Embodiments described herein provide techniques for forming an interconnect structure that includes a bowl shaped pad. Such embodiments can assist with improving interconnect joint reliability when compared to conventional pads that have a flat surface. An interconnect structure may comprise: a substrate (e.g., a semiconductor package, a PCB, etc.); and a metal pad over the substrate. The metal pad has a center region and an edge region. A thickness of the center region is smaller than a thickness of the edge region. A thickness of the center region may be non-uniform. The center region may have a bowl shape characterized by a stepped profile. The stepped profile is formed from metal layers arranged as steps. Alternatively, or additionally, the center region may have a bowl shape characterized by a curved profile. A pattern may be formed on or in a surface of the metal pad.

A display apparatus includes a flexible circuit board including a plurality of first substrate pads and a plurality of second substrate pads, a main circuit board connected to the flexible circuit board, and a display panel including a plurality of first display pads and a plurality of second display pads, where the plurality of first display pads is connected to the main circuit board through the flexible circuit board and each of the plurality of first display pads at least partially overlaps corresponding substrate pad of the plurality of first substrate pads, respectively, and each of the plurality of second display pads at least partially overlaps corresponding substrate pad of the plurality of second substrate pads, respectively.

A flexible printed circuit includes: a chip component serving as an electronic component having a first electrode and the like; a base film; a conductive first pattern layer which is laminated on a portion of the base film and has a bonding region to which the electrode is, for example, soldered; and a coverlay laminated on the base film or the first pattern layer via an adhesive and having an opening for externally exposing a portion of the first pattern layer including the bonding region, and the chip component. The first pattern layer has a groove that opens in a range between the bonding region and an edge of the opening on a surface of the first pattern layer.

A wiring substrate includes an insulating layer, a conductor layer formed on a surface of the insulating layer and including a conductor pad, a covering layer formed on the insulating layer and covering a portion of the insulating layer, an optical waveguide positioned on the surface of the insulating layer and including a core part, and a conductor post including plating metal and formed on the conductor pad such that the conductor post is penetrating through the covering layer and connected to a component. The insulating layer has a component region covered by the component when the component is connected to the conductor post, the core part has an end surface facing the opposite direction with respect to the insulating layer and exposed in the component region and a distance between the end surface and the surface of the insulating layer is greater than a thickness of the covering layer.