An electronic device includes: a first printed circuit board (PCB) including a first plate and a first hole formed in the first plate, a second PCB including a second plate, an interposer including a third plate positioned between the first plate and the second plate, a plurality of first vias connecting the first plate and the third plate, a plurality of second vias connecting the second plate and the third plate, and a first reinforcement portion positioned in the first hole to bond the first plate and the third plate.

A circuit board according to an embodiment includes an insulating layer including an upper surface and a lower surface, and having a via hole passing through the upper surface and the lower surface in a thickness direction from the upper surface to the lower surface, wherein the via hole includes: a first via part adjacent to the upper surface and having a constant inclination angle along the thickness direction; a second via part adjacent to the lower surface and having a constant inclination angle along the vertical direction; and a third via part disposed between the first via part and the second via part and having an inclination angle different from an inclination angle of the first via part and an inclination angle of the second via part.

A package substrate according to an embodiment includes an insulating layer; a first outer circuit pattern disposed on an upper surface of the insulating layer; a second outer circuit pattern disposed under a lower surface of the insulating layer; a first connection portion disposed on an upper surface of a first-first circuit pattern of the first outer circuit pattern; a first contact portion disposed on the first connection portion; a first device disposed on the first connection portion through the first contact portion; a second contact portion disposed under a lower surface of a second-first circuit pattern of the second outer circuit pattern; a second device attached to the second-first circuit pattern through the second contact portion; and a second connection portion disposed under a lower surface of a second-second circuit pattern of the second outer circuit pattern; wherein the first connection portion is disposed with a first width and a first interval, and wherein the second connection portion is disposed with a second width greater than the first width and a second interval greater than the first interval.

The present invention relates to a power module comprising: an upper ceramic substrate (300); a PCB substrate (400) disposed spaced apart from the upper ceramic substrate (300); a plurality of semiconductor chips (G1, G2, G3, G4) spaced apart from each other, arranged in parallel, and mounted on the lower surface of the upper ceramic substrate (300); and a plurality of capacitors (310) mounted on the top surface of the PCB substrate (400) to correspond to locations between the semiconductor chips (G1, G2, G3, G4). The present invention has the advantage of forming a short current path through which the semiconductor chips and the capacitors are connected, thereby increasing a circuit stabilization effect.

The invention relates to a transition from a stripline to a waveguide, wherein: the stripline, preferably a microstrip line, is located on a substrate; an upper side of the substrate has a metallised surface and the lower side of the substrate has a metal layer, preferably a high-frequency ground-potential layer; the upper side and the lower side are connected to vias; and at least part of the metallised surface on the upper side of the substrate acts as a waveguide wall.

The present disclosure relates to an electronic device, and the electronic device may include a circuit board provided within a main body of the electronic device, on which a conductive layer made of a conductive material and a dielectric layer made of an insulating material are alternately laminated; at least one or more patch antennas disposed on the circuit board; a core layer located at a central portion inside the circuit board, and configured with any one of the dielectric layers; a ground layer disposed below the core layer; and an EBG structure located inside the circuit board in a symmetrical shape at the top and bottom with respect to the core layer, and the EBG structure restricts operating frequency signals radiated from the respective patch antennas from being interfered with each other.

The present invention relates to a support-attached resin film for an interlayer insulating layer, including a support, and a resin composition layer formed on one side surface of the support in which the support has particles exposed on the one side surface, and an average maximum height of exposed portions of the particles is 1.0 μm or less, or the support has no particles exposed on the one side surface, a multilayer printed wiring board using the support-attached resin film for an interlayer insulating layer, and the multilayer printed-wiring board.

A component carrier with an asymmetric build-up, which includes (a) a core; (b) a first stack at a first main surface of the core, the first stack having at least one first electrically conductive layer structure and a plurality of first electrically insulating layer structures; and (c) a second stack at a second main surface of the core, the second stack having at least one second electrically conductive layer structure and a plurality of second electrically insulating layer structures. At least two of the second electrically insulating layer structures are in direct contact with each other and each one of these electrically insulating layer structures has a smaller thickness than and/or includes a different material property than one of the first electrically insulating layer structures. Further described are methods for designing and manufacturing such an asymmetric component carrier.

A flexible circuit board includes liquid crystal polymer (LCP) layers and metal layers including circuit routes. Each of the LCP layers includes via structures. The metal layers and the LCP layers are alternatively stacked to form a multi-layer structure. Adjacent metal layers are electrically connected through the via structures. Some via structures of different LCP layers are substantially aligned with one another to form a stack of via structures. Each of the via structures includes openings filled with conductive material. The size of the opening fulfils the following equation: Vb≥cos(Bh/Vh)*Vt/k*2, where Vb is a diameter of a smaller aperture, Vt is a diameter of a bigger aperture, Vh is a combined thickness of a LCP layer and a metal layer, Bh is a thickness of a LCP layer and k is a tensile modulus.

A connector with a tolerance module includes a socket and a plug adapted to the socket, wherein the socket includes a first housing, the plug includes a tolerance module and a third housing, the tolerance module includes a second housing, the second housing includes second contact members, the second housing is movably arranged on the third housing in a direction perpendicular to the axial direction of the connector, and the second contact members are floatingly assembled in the second housing to enable displacement in the direction perpendicular to the axial direction of the connector. The second housing only generates translational motion without displacement when the connector is inserted. The tolerance of the plug and the socket is realized by the floating assembly of the second contact members in the second housing.