A mold includes a mold base material and a rugged structure located at a main surface of the mold base material. The rugged structure includes a plurality of linearly shaped projected portions for forming wiring, and a circularly shaped projected portion for forming a pad portion, in which a light-shielding layer is provided at a top portion flat surface of the circularly shaped projected portion for forming the pad portion.

A circuit board includes a substrate, a first circuit layer, a second circuit layer, and a third circuit layer. The substrate includes a base layer, a first metal layer formed on the base layer, and a seed layer formed on the first metal layer. The first circuit layer is located on the substrate and includes the first metal layer and a signal layer formed on a surface of the first metal layer. The second circuit layer is coupled to the first circuit layer and includes the first metal layer, the seed layer, and a connection pillar formed on a surface of the first metal layer and the seed layer. The third circuit layer is coupled to the second circuit layer and includes the seed layer and a coil formed on a surface of the seed layer.

A contact element for use between electronic components like computer chips and printed circuit boards, or the connection between an electronic component in a test socket to provide high current, high density, and high frequency connections between the electronic components. The contact element preferably achieves a good connection between electrical components when they are connected and pressed together. The contact element is preferably made of a conductive silicone rubber which has been plated.

A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.

A conductive adhesive and a bonding method of circuit board are provided. The conductive adhesive includes a substrate and an insulating region formed on a surface of the substrate and a conductive region. The insulating region includes a plurality of insulating retaining walls arranged along a same direction and in intervals. The conductive region includes a plurality of conductive adhesive bodies and the conductive adhesive bodies are filled in gaps between the adjacent insulating retaining walls.

A wiring circuit board includes a base insulating layer, a conductive layer, and a metal protective film in order toward one side in a thickness direction. The conductive layer includes a signal wiring and a terminal continuous therewith. The signal wiring has one surface in the thickness direction, and first and second surfaces continuous with the one surface and disposed to face each other in a width direction. The terminal has one surface in the thickness direction, and the other surface disposed to face the one surface at the other side in the thickness direction at spaced intervals thereto. The other surface of the terminal is exposed from the base insulating layer toward the other side in the thickness direction. The metal protective film covers the one surface of the signal wiring and one surface of the terminal but not both first or second surfaces.

Provided is a method for producing a wiring circuit board capable of improving the dimensional accuracy of a second conductive layer. The wiring circuit board produced by the producing method includes a metal supporting layer, a first insulating layer disposed on one surface of the metal supporting layer in a thickness direction, a first conductive layer disposed on one surface of the first insulating layer in the thickness direction, a second insulating layer disposed on one surface of the first insulating layer in the thickness direction so as to cover the first conductive layer, and a second conductive layer disposed on one surface of the second insulating layer in the thickness direction. The producing method includes a step of forming the second insulating layer by bonding a film made of a photosensitive resin to one surfaces of the first insulating layer and the first conductive layer in the thickness direction.

A multilayer substrate includes an element assembly including a second insulating layer and a first insulating layer arranged in this order from a first side to a second side with respect to a layer stacking direction, a first conductor layer on the first side of the first insulating layer and including a plated layer, and a second conductor layer on the first side of the second insulating layer. The first conductor layer includes a first connection portion and a first circuit portion, and the second conductor layer includes a second connection portion and a second circuit portion. When viewed from the layer stacking direction, the first circuit portion includes an overlapping portion which overlaps the second circuit portion. A portion of the first connection portion connected to the second connection portion has a maximum thickness greater than a maximum thickness of the overlapping portion.

The present invention relates to methods and systems for deposition of metal conductors using asymmetrical electrolytic plating, in which one surface (e.g., top) of a substrate is coated with an electrical conductor, and an opposite (e.g., bottom, or other) surface of which is not coated. A channel is formed between the two sides of the substrate, passing through the substrate and, in some embodiments, passing through the conductor. Electrolytic plating is performed such that metal is deposited from the edge of the conduct proximal to the channel, along the side walls of the channel, and up to, and in some embodiments on to, the other side of the substrate. Use of etching or plate resist layers are also contemplated.

The present invention relates to methods and systems for deposition of metal conductors using asymmetrical electrolytic plating, in which one surface (e.g., top) of a substrate is coated with an electrical conductor, and an opposite (e.g., bottom, or other) surface of which is not coated. A channel is formed between the two sides of the substrate, passing through the substrate and, in some embodiments, passing through the conductor. Electrolytic plating is performed such that metal is deposited from the edge of the conduct proximal to the channel, along the side walls of the channel, and up to, and in some embodiments on to, the other side of the substrate. Use of etching or plate resist layers are also contemplated.