Patent classifications
H05K3/0023
PHOTOSENSITIVE ELEMENT, RESIN COMPOSITION FOR FORMING BARRIER LAYER, METHOD FOR FORMING RESIST PATTERN, AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD
A photosensitive element comprising a support film, a barrier layer, and a photosensitive layer in this order, wherein the barrier layer contains a water-soluble resin and an ultraviolet absorber.
RF integrated power condition capacitor
The present invention includes a method of fabricating an integrated RF power condition capacitor with a capacitance greater than or equal to 1 of and less than 1 mm.sup.2, and a device made by the method.
Display device and manufacturing method of same
A display device and a manufacturing method of the same are provided. The display device includes a frame, a pressure sensor, and a pressure sensing module. When a touch portion receives external pressure, a resistance value of the resistor changes, and a corresponding pressure sensing signal is output. The pressure sensing module outputs an execution signal according to the pressure sensing signal to realize a pressure touch function on a side of the frame. This eliminates a need to make holes in a side of the frame, which eliminates a mechanical button and improves dustproof and waterproof performance of the display device.
Plasma ashing for coated devices
A plasma ashing system includes a plasma generator configured to generate a plasma from a gas source. The system further includes a plasma reaction chamber configured to house a substrate comprising a Parylene coating, wherein the plasma reaction chamber is configured to expose surfaces of the Parylene coating on the substrate to the plasma, wherein the plasma is configured to remove portions of the Parylene coating on the substrate.
Manufacturing method of circuit board
A manufacturing method of a circuit board including the following steps is provided. A carrier substrate is provided. A patterned photoresist layer is formed on the carrier substrate. An adhesive layer is formed on the top surface of the patterned photoresist layer. A dielectric substrate is provided. A circuit pattern and a dielectric layer covering the circuit pattern are formed on the dielectric substrate, wherein the dielectric layer has an opening exposing a portion of the circuit pattern. The adhesive layer is adhered to the dielectric layer in a direction that the adhesive layer faces of the dielectric layer. The carrier substrate is removed. A patterned metal layer is formed on a region exposed by the patterned photoresist layer. The patterned photoresist layer is removed. The adhesive layer is removed.
DISPLAY DEVICE AND MANUFACTURING METHOD OF SAME
A display device and a manufacturing method of the same are provided. The display device includes a frame, a pressure sensor, and a pressure sensing module. When a touch portion receives external pressure, a resistance value of the resistor changes, and a corresponding pressure sensing signal is output. The pressure sensing module outputs an execution signal according to the pressure sensing signal to realize a pressure touch function on a side of the frame. This eliminates a need to make holes in a side of the frame, which eliminates a mechanical button and improves dustproof and waterproof performance of the display device.
PHOTOSENSITIVE INSULATING PASTE AND ELECTRONIC COMPONENT
A photosensitive insulating paste according to preferred embodiments of the present disclosure contains glass frit, a first inorganic filler, a second inorganic filler, an alkali-soluble polymer, a photosensitive monomer, a photopolymerization initiator, and a solvent. The first inorganic filler has a refractive index of 1.7 or higher. The second inorganic filler has a refractive index of 1.55 or lower. An electronic component according to preferred embodiments of the present disclosure is produced by using the photosensitive insulating paste.
CONDUCTOR TRACE STRUCTURE REDUCING INSERTION LOSS OF CIRCUIT BOARD
A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.
Asymmetric electronic substrate and method of manufacture
An asymmetric electronic substrate and method of making the substrate includes forming a first layer on each opposing major surface of a removable carrier layer, the first layer being a routing layer, simultaneously laminating the first layers, and building up subsequent layers on layers previously formed and laminated on the removable carrier layer iteratively. The subsequent layers including routing layers and a core layer formed on each side of the removable carrier layer, the core layer including through holes having a larger gauge than through holes included in the routing layers. A number of layers on a first side of the core layer, between the core layer and the carrier layer, is different than a number of layers on a second side of the core layer. The carrier layer is removed to produce two asymmetric substrates, each asymmetric substrate including one of the at least one core layers.
Plasma Ashing for Coated Devices
A plasma ashing system includes a plasma generator configured to generate a plasma from a gas source. The system further includes a plasma reaction chamber configured to house a substrate comprising a Parylene coating, wherein the plasma reaction chamber is configured to expose surfaces of the Parylene coating on the substrate to the plasma, wherein the plasma is configured to remove portions of the Parylene coating on the substrate.