Patent classifications
H05K3/0047
Method and Drill for Removing Partial Metal Wall of Hole
The method for removing partial metal wall of hole of the present invention includes the following steps. First, a circuit board is provided. The circuit board includes a plurality of circuit layers, a plurality of dielectric layers, and a plated through hole. Each of the dielectric layers is between two adjacent circuit layers. The wall of the plated through hole includes at least one residual copper. The circuit layer immediately below the residual copper is defined as a signal layer. Next, a position of the signal layer and a position of the residual copper in the plated through hole are obtained. Next, a drill is provided, the drill includes a main body and at least one needle, and the drill is moved to the position of the residual copper. The main body is rotated around the central axis of the main body, so the needle can remove part of the residual copper.
PACKAGING STRUCTURES AND PACKAGING METHODS FOR ULTRASOUND-ON-CHIP DEVICES
A method of manufacturing an ultrasound imaging device involves forming an interposer structure, including forming a first metal material within openings through a substate and on top and bottom surfaces of the substrate, patterning the first metal material, forming a dielectric layer over the patterned first metal material, forming openings within the dielectric layer to expose portions of the patterned first metal material, filling the openings with a second metal material, forming a third metal material on the top and bottom surfaces of the substrate, and patterning the third metal material. The method further involves forming a packaging structure for an ultrasound-on-chip device, including attaching a multi-layer flex substrate to a carrier wafer, bonding a first side of an ultrasound-on-chip device to the multi-layer flex substrate, bonding a second side of the ultrasound-on-chip device to a first side of the interposer structure, and removing the carrier wafer.
Circuit Board Traces in Channels using Electroless and Electroplated Depositions
A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.
Carrier board structure with an increased core-layer trace area and method for manufacturing same
Carrier board structure with an increased core-layer trace area and method for manufacturing the same are introduced. The carrier board structure comprises a core layer structure, a first circuit build-up structure, and a second circuit build-up structure. The core layer structure comprises a core layer, a signal transmission portion, and an embedded circuit layer, wherein the signal transmission portion and the embedded circuit layer are disposed inside the core layer and electrically connected. The first circuit build-up structure is disposed on the core layer on a same side as the embedded circuit layer and is electrically connected to the embedded circuit layer. The second circuit build-up structure is disposed on the core layer on a same side as the signal transmission portion, and is electrically connected to the first circuit build-up structure through the signal transmission portion and the embedded circuit layer.
Ceramic and polymer composite, methods of making, and uses thereof
A ceramic and polymer composite including: a first continuous phase comprising a sintered porous ceramic having a solid volume of from 50 to 85 vol % and a porosity or a porous void space of from 50 to 15 vol %, based on the total volume of the composite; and a second continuous polymer phase situated in the porous void space of the sintered porous ceramic. Also disclosed is a composite article, a method of making the composite, and a method of using the composite.
Component carrier with embedded component exposed by blind hole
The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.
MANUFACTURING METHOD FOR PCB WITH THERMAL CONDUCTOR EMBEDDED THEREIN, AND PCB
A method for manufacturing a PCB with an embedded thermal conductor and a PCB are provided. A sheet of copper-clad ceramic serves as a thermal conductor. A sheet of copper foil having no opening serves as an outer layer of a laminate. A part of the sheet of copper foil covering the thermal conductor is removed after a lamination process, to expose a conductive layer as the outer layer of the thermal conductor. Finally, the outer layer pattern is formed. The sheet of copper foil has no opening before the lamination process, so that the sheet of copper foil has good flatness during the lamination process, thereby avoiding wrinkles. Moreover, the sheet of copper-clad ceramic serves as the thermal conductor, so that a pattern is manufactured on the outer layer of the thermal conductor based on the exposed conductive layer.
Component carrier with a solid body protecting a component carrier hole from foreign material ingression
A component carrier includes (a) a first stack with at least one first electrically conductive layer structure and/or at least one first electrically insulating layer structure; (b) a hole formed within the first stack; and (c) a non-deformable solid body closing a portion of the hole and being spaced with respect to side walls of the hole by a gap. A component carrier assembly includes (a) a component carrier as described above; (b) a second stack having at least one second electrically conductive layer structure and/or at least one second electrically insulating layer structure; and (c) a connection piece connecting the first stack with the second stack. Further described are methods for manufacturing such a component carrier and such a component carrier assembly.
FORMING WAVEGUIDES AND HEAT TRANSFER ELEMENTS IN PRINTED CIRCUIT BOARDS
A method is provided for forming waveguides in a PCB. The method may include forming an opening in a PCB core comprising a plurality of conductive layers interleaved with a plurality of insulating layers, the opening extending from a first side of the PCB core to a second side of the PCB core. The method may also include filling the opening with metal. The method may also include forming a cavity enclosed by sidewalls by removing a first portion of the filled opening, the cavity extending from the first side of the PCB core to the second side of the PCB core. A second portion of the filled opening is a heat transfer element configured to transfer heat from the first side of the PCB core to the second side of the PCB core. The at least one waveguide is embedded within the heat transfer element and configured for transmitting signals from the first side to the second side.
PCB structure for embedding electronic components
A PCB, printed circuit board, structure for forming at least one embedded electronic component. The structure comprises a multi-layer PCB board comprising at least one through-hole via, the via comprising a plurality of electrodes vertically aligned within the via, each electrode comprising a plated ring; and an isolation section separating each of the electrodes.