An electronic device embedded substrate and a method of manufacturing the same includes a substrate comprising a cavity formed therein, and an electronic device embedded in the cavity. The substrate and method thereof also include a first support pattern part formed on one surface of the substrate and pressing the electronic device to restrict a movement of the electronic device within the cavity, and a second support pattern part formed on another surface of the core substrate facing opposite to the one surface and extended toward an inside of the cavity to support the electronic device.

The invention describes a circuit assembly comprising a circuit board with a metal core, a pattern of conductive tracks, and a dielectric layer between the metal core and the conductive tracks; at least one circuit component mounted to the circuit board by means of solder interconnects, wherein a solder interconnect is formed between a contact pad of the circuit component and a conductive track; characterized in that the metal core comprises at least one cavity, wherein a cavity is arranged in the vicinity of a solder interconnect. The invention further describes a circuit board for such a circuit assembly, and a method of manufacturing such a circuit assembly.

There are provided a printed circuit board and a method of manufacturing the same. The printed circuit board include a glass plate, an insulating member penetrating through the glass plate, insulating layers disposed on a first surface and a second surface of the glass plate, and a via through the insulating member.

A circuit board in which damage to an electrode is reduced or a light-emitting device in which damage to an electrode is reduced is manufactured. A method for manufacturing the circuit board or the light-emitting device includes the following steps: preparing a processing member including a circuit and a terminal electrode over a first substrate, a separation layer over the terminal electrode, a bonding layer over the separation layer, and a second substrate over the bonding layer; forming a groove in the processing member using a blade capable of cutting processing by being rotated; and removing part of the separation layer, part of the bonding layer, and part of the second substrate to expose part of the terminal electrode.

A method for manufacturing an interconnect structure and an interconnect structure are provided. The method includes: forming an opening in a substrate; forming a low-k dielectric block in the opening; forming at least one via in the low-k dielectric block; and forming a conductor in the via. The interconnect structure includes a substrate, a dielectric block, and a conductor. The substrate has an opening therein. The dielectric block is present in the opening of the substrate. The dielectric block has at least one via therein. The dielectric block has a dielectric constant smaller than that of the substrate. The conductor is present in the via of the dielectric block.

A method of making a wiring board includes forming a first capacitor carrier layer with a first embedded chip capacitor, a first insulation layer disposed on an upper surface, a second insulation layer disposed on a lower surface, first upper and lower conductive vias in conductive contact with a first electrode, and second upper and lower conductive vias in conductive contact with a second electrode. The method also includes forming a second capacitor carrier layer similar to the first. The method further includes forming a bonded laminate comprising in sequence an upper insulation layer, the first capacitor carrier layer, a center insulation layer, the second capacitor carrier layer, and a lower insulation layer. The method also includes forming a through-hole through the laminate and forming a conductive coating within the through-hole to provide a conductive through-hole. A wiring board also includes the bonded laminate and the embedded capacitors.

Systems and methods for grooved vias are described. For example, a method may include: drilling a via hole in a Printed Circuit Board (PCB), where the PCB comprises a first layer having a first trace and a second layer having a second trace, the via hole includes a first portion between the first layer and the second layer and a second portion between the second layer and a bottom surface of the PCB, and the via hole is configured to couple the first trace to the second trace through the first portion; after drilling the via hole, creating a rough internal surface in at least the second portion of the via hole that is configured to reduce a resonance of a signal transmitted from the first trace to the second trace; and forming a via by filling the first and second portions of the via hole with conductive material.

An electrical break is created in a via that would ordinarily electrically connect different layers of a printed circuit board. The electrical break severs the via into two or more separate and electrically disconnected vias. The electrical break may be placed at any depth along the via, thus demarking different purposes associated with different layers.

A printed circuit board includes a plurality of layers including attachment layers and routing layers; first and second signal vias forming a differential signal pair, the first and second signal vias extending through the attachment layers and connecting to respective signal traces on a breakout layer of the routing layers; an antipad of a first type around and between the first and second signal vias in one or more of the attachment layers; and antipads of a second type around the first and second signal vias in at least one routing layer adjacent to the breakout layer.

An interconnect structure includes a substrate, a dielectric block, and a conductor. The dielectric block is in the substrate. A dielectric constant of the dielectric block is smaller than a dielectric constant of the substrate, and the dielectric block and the substrate have substantially the same thickness. The conductor includes a first portion extending from a top surface to a bottom surface of the dielectric block and a second portion extending along and contacting the top surface of the dielectric block.