A component carrier and a method for manufacturing the same are disclosed. The component carrier includes an electrically conductive layer structure and an overhanging end. A first surface finish is formed on a first surface portion of the electrically conductive layer structure. Furthermore, the component carrier further includes a second surface finish on a second surface portion of the electrically conductive layer structure connected to the first surface finish and extending under the overhanging end.

The present invention relates to an etching solution composition for selectively etching only silver, a silver alloy, or a silver compound, and to a circuit forming method using the composition. The circuit forming method according to the present invention is characterized in that, in a substrate material in which an electrically conductive seed layer and a circuit layer are formed of heterogeneous metals, only the seed layer is selectively etched to enable the implementation of fine pitches. In addition, the present invention relates to a circuit forming method and an etching solution composition, wherein only a seed layer of silver (Ag), a silver alloy, or a silver compound is selectively etched without etching a copper (Cu) plated circuit.

A method of etching an electrically conductive layer structure during manufacturing a component carrier is provided. The method includes subjecting the electrically conductive layer structure to an etching composition having an etchant and a photosensitive compound to thereby form a recess in the electrically conductive layer structure; while, at least for a part of time, irradiating and/or heating the recess. In addition, an apparatus for etching an electrically conductive layer structure during manufacturing a component carrier, an etched electrically conductive layer structure and a component carrier are provided.

According to one embodiment, a method for manufacturing a ceramic circuit board is disclosed. The ceramic circuit board includes a copper plate bonded to at least one surface of a ceramic substrate via a brazing material layer including Ag, Cu, and a reactive metal. The method includes: preparing a ceramic circuit board in which a copper plate is bonded on a ceramic substrate via a brazing material layer, and a portion of the brazing material layer is exposed between a pattern shape of the copper plate; a first chemical polishing process of chemically polishing the portion of the brazing material layer; and a first brazing material etching process of etching the chemically polished portion of the brazing material layer by using an etchant having a pH of 6 or less and including one type or two types selected from hydrogen peroxide and ammonium peroxodisulfate.

An etching composition for etching an electrically conductive layer structure for forming a conductor track is provided. The etching composition includes an etchant, a highly branched compound and optionally a solvent. In addition, a method of etching an electrically conductive layer structure, a conductor track, an arrangement of at least two conductor tracks, and a component carrier are provided.

The disclosure relates to a microcircuit forming method. The microcircuit forming method according to the disclosure comprises: a seed-layer forming step for forming a high-reflectivity seed layer on a substrate material by using a conductive material; a pattern-layer forming step for forming a pattern layer on the seed layer, the pattern layer having a pattern hole arranged thereon to allow the seed layer to be selectively exposed therethrough; a plating step for filling the pattern hole with a conductive material; a pattern-layer removing step for removing the pattern layer; and a seed-layer patterning step for removing a part of the seed layer which does not overlap the conductive material in the plating step, wherein the high-reflectivity seed layer has a specular reflection property.

A method of manufacturing a transparent electrode substrate according to an exemplary embodiment includes: a) forming a structure including a transparent base, a bonding layer on a surface of the transparent base, and a metal foil on a surface of the bonding layer opposite the transparent base; b) forming a metal foil pattern by patterning the metal foil; c) heat-treating the structure resulting from b) at a temperature of 70° C. to 100° C.; and d) completely curing the bonding layer. Also, a transparent electrode substrate is disclosed.

A wiring circuit board assembly sheet is partitioned by a product region in which a plurality of wiring circuit boards serving as products are disposed in alignment and a margin region surrounding the product region with the margin region having a first area adjacent to the product region and a second area located at the opposite side of the product region with respect to the first area. The wiring circuit board assembly sheet includes a dummy wiring circuit board disposed in at least a portion of the first area and smaller than the wiring circuit board.

A method for manufacturing a touch sensor includes the steps of: a) forming both a first touch conductive trail pattern (TCTP) and a first auxiliary conductive trail pattern (ACTP) on a first side of a dielectric substrate; and b) forming both a second TCTP and the second ACTP on a second side of the dielectric substrate, wherein each of the first and second ACTPs has micro auxiliary conductive units electrically disposed in an area range of the first and second TOTPs, and a shading rate of the micro auxiliary conductive units is below 1%. The first and second TCTPs and the first and second ACTPs jointly constitute a touch sensor. A sheet resistance of each of the first and second TCTPs is between 80 and 150 ohm/sq, and a sheet resistance of each of the first and second ACTPs is between 0.05 and 0.2 ohm/sq.

The present invention relates to the production of a layer structure, comprising the following process steps: i) coating a substrate with a composition at least comprising silver nanowires and a solvent; ii) at least partial removal of the solvent, thereby obtaining a substrate that is coated with an electrically conductive layer, the electrically conductive layer at least comprising the silver nanowires; iii) bringing into contact selected areas of the electrically conductive layer with an etching composition, thereby reducing the conductivity of the electrically conductive layer in these selected areas, wherein the etching composition comprises an organic compound capable of releasing chlorine, bromine or iodine, a compound containing hypochloride, a compound containing hypo-bromide or a mixture of at least two of these compounds. The invention also relates to a layer structure obtainable by this method, a layer structure, the use of a layer structure, an electronic component and the use of an organic compound.