Technologies for applying gold-plated contact pads to circuit boards are disclosed. In one embodiment, an array of gold-plated contact pads is prepared on a flexible substrate. The array of gold-plated contact pads can then be transferred to a circuit board, such as by soldering the gold-plated contact pads to the circuit board. In another embodiment, an array of contact pads are prepared on a top and bottom surface of a substrate, and vias are added to connect the contact pads on the top and bottom surfaces. The top array of contact pads are gold-plated. The bottom array of contact pads are mated to a circuit board. Techniques described herein allow for gold-plated contact pads to be applied to a circuit board without requiring the entire circuit board to undergo a gold plating process, which may reduce manufacturing costs.

A wiring board of the present disclosure comprises an insulating layer, a first conductor layer located on the surface of the insulating layer and containing any one of nickel and chromium, a metal belonging to group of the periodic table; or a metal belonging to group of the periodic table, a second conductor layer located inside the outer circumferential edge on the first conductor layer and containing copper, a third conductor layer located on the surface of the insulating layer in a state of covering the first conductor layer and the second conductor layer and containing nickel, and a fourth conductor layer located in a state of covering the third conductor layer and containing gold. The third conductor layer has an overhanging part extending outward from the outer circumferential edge of the first conductor layer, and the fourth conductor layer is located between the overhanging part and the insulating layer.

A high-speed transmission circuit comprises a connector pin that serves as part of a signal path, has a first conductivity, and has a connector pin leg that is coupled to a pad that has a second conductivity lower than the first conductivity. The connector pin leg and at least a portion of the pad form a resonant sub-circuit coupled to the signal path. The second conductivity causes a reduction in insertion loss in the signal path by damping a current in the resonant sub-circuit.

Embodiments of the present invention provide a method (1000) of assembling an electrical circuit comprising one or more copper electrical conductors, the method comprising plating (1010) a surface of the one or more conductors with a layer comprising tin; annealing the plating; applying (1020) solder to at least a portion of the one or more electrical conductors, wherein said solder comprises tin and copper; and annealing the electrical circuit.

A printed wiring board according to an aspect of the present invention includes a base film having insulation properties and a conductive pattern including multiple wiring portions laminated, the conductive pattern running on at least one surface of the base film, wherein each wiring portion includes a first conductive portion and a second conductive portion coating an outer surface of the first conductive portion, wherein an average width of each wiring portion is 10 μm or greater to 50 μm or smaller, and an average thickness of the second conductive portion is 1 μn or greater to smaller than 8.5 μm.

Provided is a ceramic laminated substrate which is formed on an electronic component to be mounted and is less likely to cause mounting defects even if there is irregularity in the height of solders. The ceramic laminated substrate includes: a ceramic laminate on which ceramic layers are laminated; via conductors; terminal electrodes; and a land electrode. The land electrode has a first land electrode and a second land electrode that are used to join different terminal electrodes of a single electronic component. The area of the first land electrode is smaller than the area of the second land electrode, and the first land electrode has a bump electrode and a plating layer, the second land electrode has a membrane electrode and plating layers, and the height of the first land electrode is formed higher than the height of the second land electrode.

A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer; a surface electrode on a surface of the electronic component body; and a covering ceramic layer covering a peripheral section of the surface electrode. The peripheral section of the surface electrode that is covered by the covering ceramic layer has a thin portion located on a central side of the surface electrode and which is thinner than a central section of the surface electrode, and a width of the thin portion is 20% or more of a width of the peripheral section of the surface electrode that is covered by the covering ceramic layer.

The present invention relates to a surface modifier for electrolytic nickel plating including at least one carboxyl group-containing compound and a nickel electroplating solution including the surface modifier. The use of the nickel electroplating solution according to the present invention enables efficient formation of a plated nickel layer with high surface roughness and mattness even without performing strong electrolysis, unlike in the prior art.

In a plating method, a laminate made of stainless steel, and copper or a copper alloy is prepared. Plating underlayers made of nickel are formed on a first plated portion provided at the stainless steel and a second plated portion provided at the copper or the copper alloy at the same time with use of a hydrochloric acid electrolytic solution.

A multilayer printed wiring board and a method of manufacturing the same are provided. A multilayer printed wiring board of the present embodiment includes: a core base material formed by laminating a first wiring layer and a first insulating layer in this order on an insulating substrate; and a built-up layer formed by laminating a second wiring layer and a second insulating layer in this order on the core base material. A primer layer is formed between the second wiring layer and the first insulating layer, the second wiring layer has a lower surface at least part of which is in contact with the primer layer, and the second wiring layer has an upper surface and a side surface on both of which a tin-plated layer and a silane coupling layer are formed in this order.