A process for electrochemical deposition of copper, including: providing a rolled and annealed copper foil comprising a first surface and a second surface, etching the first surface of the rolled and annealed copper foil, thereby creating a first etched surface, depositing copper by electroless copper deposition on the first etched surface, thereby creating a first electroless copper layer on the first etched surface, depositing further copper by electrochemical deposition on the first electroless copper layer, thereby creating a first electrochemical copper layer, wherein in the electrochemical deposition in a first period of time a first current density is applied and in a second period of time a second current density is applied, wherein the second current density is lower than the first current density, and a layered product obtainable by the process.

An etching solution for copper and copper alloy surfaces comprising at least one acid, at least one oxidising agent suitable to oxidise copper, at least one source of halide ions and further at least one polyamide containing at least one polymeric moiety according to formula (I)

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wherein each a is independently from each other selected from 1, 2 and 3; each b is an integer independently from each other ranging from 5 to 10000; each R.sup.1 is a monovalent residue independently from each other selected from the group consisting of substituted or unsubstituted C1-C8-alkyl groups and a method for its use are provided. Such etching solution is particularly useful for retaining the shape of treated copper and copper alloy lines.

Disclosed are: a microetching agent which can form roughened shapes less affected by differences in the crystallinity of the copper and with which roughened shape excellent in terms of adhesiveness to resins, etc. can be formed on either electrolytic copper or rolled copper; and a method for producing a wiring board which includes a step of roughening a copper surface using the microetching agent. In the present invention, the microetching agent for copper is an acidic aqueous solution containing an inorganic acid, a cupric ion source, a halide ion source, and a polymer. The polymer has a functional group containing a nitrogen atom. It is preferable that the microetching agent contain a sulfate ion source.

High-speed interconnects for printed circuit boards and methods for forming the high-speed interconnects are described. A high-speed interconnect may comprise a region of a conductive film having a reduced surface roughness and one or more regions that have been treated for improved bonding with an adjacent insulating layer. Regions of reduced roughness may be used to carry high data rate signals within PCBs. Regions treated for bonding may include a roughened surface, adhesion-promoting chemical treatment, and/or material deposited to improve wettability of the surface and/or adhesion to a cured insulator.

A surface treatment solution for copper and copper alloy surfaces comprising an acid and an oxidising agent selected from the group consisting of hydrogen peroxide, metal peroxides, metal superoxides and mixtures thereof, at least one source of chloride ions and at least one source of bromide ions. The surface treatment solution is particularly useful in the manufacturing of printed circuit boards, IC substrates and other electronic appliances.

Methods for manufacturing electrical circuits on laminates from low profile copper layers where one or more of the circuits have known and reproducible signal losses. The method for manufacturing printed circuit boards (40) comprising the steps of: providing a planar sheet (16) including a planar dielectric material layer having a first planar surface and a second planar surface, and first copper foil sheet (10) having a first planar surface and a second planar surface wherein the first copper foil planar surface is associated with the first dielectric material layer planar surface and wherein the first copper foil sheet first surface and second surface each include a bond enhancement layer (12, 14); and forming a circuit pattern (32, 34, 36) in the first planar copper sheet by removing unnecessary portions of the first planar copper sheet while leaving the circuit pattern copper in place to form an inner layer sheet including a circuit pattern wherein a bond enhancement layer is not applied to the circuit pattern after forming the circuit pattern.

High-speed interconnects for printed circuit boards and methods for forming the high-speed interconnects are described. A high-speed interconnect may comprise a region of a conductive film having a reduced surface roughness and one or more regions that have been treated for improved bonding with an adjacent insulating layer. Regions of reduced roughness may be used to carry high data rate signals within PCBs. Regions treated for bonding may include a roughened surface, adhesion-promoting chemical treatment, and/or material deposited to improve wettability of the surface and/or adhesion to a cured insulator.

Provided is a micro-roughened electrodeposited copper foil, which comprises a micro-rough surface and multiple copper nodules. The micro-roughened electrodeposited copper foil has an Sdr of 0.01 to 0.08. With the surface characteristics, the electron path distance can be shortened, such that the micro-roughened electrodeposited copper foil can reduce the insertion loss of the copper clad laminate at high frequencies and have the desired peel strength.

A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.

Sheets are laminated on each other and pressure bonded with fixtures from upper and lower directions of a lamination direction while being heated to produce a laminated circuit substrate including therein a capacitor and a coil. The capacitor is defined by a first conductor pattern and a second conductor pattern that face each other across thermoplastic resin layers. In the laminated circuit substrate, the first conductor pattern includes a first principal surface, the second conductor pattern includes a second principal surface, the first principal surface faces the second conductor pattern, the second principal surface faces the first conductor pattern, and the first principal surface and the second principal surface are subject to a roughening process.