A printed circuit board (PCB) includes: a substrate; and a circuit pattern disposed on the substrate, wherein the circuit pattern includes a first seed layer disposed on the substrate and including a nitride, and a metal layer disposed on the first seed layer.

Fuse assemblies are disclosed. In one implementation, a fuse assembly may be disposed that includes a first portion of the second portion. The first portion may be formed of a first metal. The second portion may be formed of a second metal different from the first metal. The second metal may be copper, and the copper may be tin plated or silver plated.

An electronic device and manufacturing method thereof are disclosed. The manufacturing method of the electronic device comprises following steps: forming at least a thin-film conductive line on the substrate by a thin-film process; forming at least an electrical connection pad on the substrate by a printing process, wherein the electrical connection pad is electrically connected with the thin-film conductive line; and disposing at least an electronic element on the substrate, wherein the electronic element is electrically connected with the thin-film conductive line through the electrical connection pad. The electronic device has a lower manufacturing cost and a higher component configuration density, and the production yield and reliability of the electronic device are improved by the configuration of the electrical connection pad.

Various embodiments are directed to a method of forming an apparatus including placing a first electronic circuit in contact with a second electronic circuit, wherein each of the first and second electronic circuits have connector circuits configured and arranged to provide an electrical connection between the first and second electronic circuits and are formed with a polymer film that is configured to adhere, via self-healing, to another polymer film. The method further includes, in response to the contact, causing or facilitating the self-healing of the respective polymer films of the first and second electronic circuits, thereby creating the electrical connection therebetween.

A resin multilayer substrate includes a laminate including resin layers including a first resin layer and a second resin layer that are laminated, a via conductor in the first resin layer, and a joint portion that includes at least a portion in the second resin layer and is joined to the via conductor. The joint portion is more brittle than the via conductor. A linear expansion coefficient of the second resin layer is larger than a linear expansion coefficient of the via conductor and a linear expansion coefficient of the joint portion, and is smaller than a linear expansion coefficient of the first resin layer.

There is provided an electric connection member having a substrate, an insulating adhesive layer provided on the substrate, and a conductive interconnect, wherein the electric connection member is provided with a recess that opens at a side of the insulating adhesive layer, the conductive interconnect is disposed in the recess, a metal nano-ink is disposed on the conductive interconnect, and all of the metal nano-ink is contained inside the recess.

A composite circuit board includes an insulation layer, an inner circuit layer, a first conductive layer and a second conductive layer embedded in the insulation layer, a third conductive layer and a fourth conductive layer formed on opposite surfaces of the insulation layer. The third conductive layer electrically connects with the first conductive layer. The fourth conductive layer electrically connects with the second conductive layer. The inner circuit layer is in a middle portion of the insulation layer. The first conductive layer and the second conductive layer respectively forms on opposite sides of the inner circuit layer. The insulation layer forms a plurality of first through holes between the first conductive layer and the inner circuit layer, a plurality of second through holes between the second conductive layer and the inner circuit layer.

A wiring substrate includes a first wiring layer on a surface of a first insulating layer; a via interconnect including a first portion connected to the first wiring layer and a second portion formed monolithically with the first portion and extending from an end of the first portion in a direction away from the first wiring layer; a second insulating layer on the first insulating layer; and a second wiring layer on the second insulating layer, contacting a first surface of the second portion. The area of a cross section of the first portion, parallel to the surface of the first insulating layer, increases as the position of the cross section approaches the first wiring layer from the second portion. The second portion includes a second surface that is opposite from its first surface and extends horizontally from the end of the first portion to overhang the first portion.

In some embodiments, methods include drilling one or a plurality of PTHs with any industrial grade drill to fabricate holes with positive etch back, flooding the PTHs with a dilute solution of an acrylate monomer/oligomer containing an appropriate level of peroxide initiator, polymerizing the acrylate, and then rising the PTHs with the solvent used in the formulation of the acrylate material. In one embodiment, the printed circuit board may include a substrate comprising a plurality of metal layers separated by a plurality of insulating layers; a plurality of plated through holes formed in the substrate, each plated through hole comprising: recesses formed at each insulating layer, copper lands between the recesses, a polymer coating in each recess, and a metal layer lining the plated through hole.

A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.